Projector Service Manual
Table Of Contents
- DECLARATION OF CONFORMITY
- BZSAFE.PDF
- CH1INTRO.PDF
- CH2SYSDE.PDF
- Functional Descriptions
- Contents
- Cover and Base
- External Power Requirements
- Electronics Systems Overview
- System Power
- Card Cage
- Circuit Boards
- Raster Timing Generator Board (RTG) p/n 100568
- Sync Generator
- Sync Detector and Selector
- Serration and Equalization Lockout
- Phase Locked Loop
- VSYNC Detector, Field Separator, and Mux
- Adjustment Counters
- Serial Communication
- Raster Timing Generator I/O
- Interlocks and Protection
- Horizontal Deflection Board P/N 102523 (HDB)
- Vertical Oscillator
- Horizontal Phase Locked Loop
- Horizontal Centering
- Horizontal Power Supply
- Flyback Switching
- Geometric Correction
- Output Section
- Horizontal Sweep Failure Detection
- Serial Communication
- Horizontal Deflection Board I/O
- Interlocks and Protection
- Vertical Deflection Board P/N 102521(VDB)
- Vertical Preamps
- Vertical Amplifiers
- Sweep Failure Detection
- Side Pincushion and Keystone Correction
- Horizontal Linearity Correction
- Top and Bottom Pincushion and Keystone Correction
- Correction Amplifiers
- Serial Communication
- General I/O
- Interlocks and Shutdowns
- Video Processor Board P/N 104672 (VPB)
- Decoder
- Video/Sync Mux
- V & H Sync Strip
- SG Sync Strip
- B, G, and R Brightness and Contrast Amplifiers
- On-Screen Switch
- Gamma Correction
- Switch Logic and Video Enable
- RGB Sensitivity and Threshold Amplifier
- ILA® Bias
- Dynamic Focus Amplifier
- Serial Communication
- General I/O
- Interlocks and Protection
- Video Amplifier Board P/N 103567 or 103774 (VAB)
- Video Signal
- Failure Detection
- Beam Current Sense
- DC Restore
- Arc Protection
- Blanking
- Enable Circuit
- Focus
- Filament Supply
- General I/O
- System Controller Board P/N 104668 (SCB)
- General Functional Description
- CPU
- Working and Compressed Memory
- Expanded Memory
- Correction Address Generator
- DACs
- DSP
- Overlay Memory
- Overlay Address Generator
- Overlay Interface
- LED Display Buffers and Logic
- RS232 Interface
- IR Interface
- IIC Interface
- Serial Interface
- General I/O
- Backplane Board p/n 100571
- Optical Section
- Image Light Amplifier
- Functional Descriptions
- CH3ADJST.PDF
- CH4MAINT.PDF
- Maintenance Remove/Replace)
- Contents
- Introduction
- Projector Covers
- Ventilation Filters
- Arc Lamp Assembly
- System Power Supply
- Electronics Module
- Cathode Ray Tube (CRT)
- Video Amplifier Board (VAB)
- CRT Yoke
- High Voltage Power Supply (HVPS)
- Card Cage (Printed Circuit Boards)
- Image Light Amplifier Assembly
- Projection Lens
- (SCB) Socket Battery Replacement
- Recommended Spares
- Maintenance Remove/Replace)
- CH5TRBSH.PDF
- HGLOSS.PDF

Chapter 2—Functional Descriptions
2-30 Model 330. 340SC, and 370SC Service Manual
Bus
I/O
Information
Description
IIC
I
Serial data load
Command to the serial data receiver that the
incoming data is to be read.
Serial
I
HPHASE
Commanded horizontal phase of picture.
Serial
I
HLINR
Commanded amount of overall H linearity
correction.
Serial
I
TBKEY
Commanded amount of top and bottom Keystone
Correction.
Serial
I
HCENTBLU
Commanded horizontal position of blue raster.
Serial
I
HCENTGRN
Commanded horizontal position of green raster.
Serial
I
HCENTRED
Commanded horizontal position of red raster
Serial
I
WIDTH
Commanded width of raster
Horizontal Deflection Board I/O
This section provides a description of the inputs to and outputs from the HDB. The I/O
description are arranged by the source/destination of the signal and so the assemblies
communicated with are used as the primary heading of each group of signals and then are
further subdivided into inputs and outputs. In each case, the signal's direction is noted,
with input referring to an input to the RTG, and output to an output from the HDB. (e.g.:
under Raster Timing Generator 'Input'; /VFBST refers to the signal /VFBST that is an
input to the HDB from the Raster Timing Generator). When test points are provided for
the I/O they are noted.
Table 2-7
Horizontal Deflection Board I/O Signals
System Controller Board
Inputs
Description
IICCLK
IIC clock line. Unidirectional clock line for control of synchronous data
transfer over IIC data bus.
+SERCLK
Serial data transfer clock (+). Unidirectional, differential clock line from
SCB to other circuit boards. Used for synchronous control of serial
communication over SERDATA data lines.
-SERCLK
Serial data transfer clock (-).
System Controller Board
Inputs
Description
+SERDATA
Serial data transfer. Unidirectional, differential, synchronous serial data
communication line. Used for transferring data from SCB to other
circuit boards. Uses SERCLK and IIC for control of receiver.
-SERDATA
Serial data transfer
Outputs
Description
/IICINT
IIC interrupt line. Signal line for slave boards to inform the SCB (master)
that there is data to be transferred. Master then polls slaves to
determine the source of the interrupt.
I/O
Description










