User's Manual

Doc No: WG1300-00 EM Board-UG-D01
Copyright © JORJIN TECHNOLOGIES INC. 2012
http://WWW.JORJIN.COM.TW
CONFIDENTIAL
Page 8
2.4. Schematics
Figure 4 is the schematics of WG1300-00 EM Board
R14 0R
RES1608
SCL_CC3000
EEPROM select:
Test mode => R1,R2 - NL
Functional mode => R1,R2 - 0R to short
VBAT_IN: 2.7V~4.8V => 3.3V TYP
VIO_HOST: Voltage of Host Level (1.2V~3.6V)
SCL_CC3000
SCL_EEPROM
SDA_CC300
SDA_E EPROM
VBAT_SW_EN
VIO_H OST
C3
10pF
CAP1005
J1
U.FL-R-SMT(10)
U.FL
1
2
3
L2
NL
IND1005
C1
10pF
CAP1005
L1
NL
IND1005
C2
NL_10pF
CAP1005
ANT1
AT8010
AT8010
1
2
VIO_HOST=VBAT_IN in MSP430 case
VBAT_IN
R21 0R
RES1005
EXT_32KHz
R1 0R RES1005
EXT_32KHz
R20 0R
RES1005
C4
1uF
CAP1005
EXT_32KHz
VBAT_SW_EN
VBAT_IN
J3
HEADER 1x2
pitch 2.0-1x2
1 2
WL_RS232_TX
WL_RS232_RX
WL_SPI_CS
WL_SPI_DOUT
WL_SPI_IRQ
WL_SPI_DIN
WL_SPI_C LK
VBAT_IN
WG1300-00 Module
WL_SPI_CLK
WL_SPI_DIN
WL_SPI_IRQ
WL_SPI_DOUT
WL_SPI_CS
R190RRES1005
R170RRES1005
R150RRES1005
R160RRES1005
R180RRES1005
WL_SPI_CLK
WL_SPI_DIN
WL_SPI_IRQ
WL_SPI_DOUT
WL_SPI_CS
NS_UARTD
FUNC4
WL_UART_DBG
J4
NL_HEADER 1x12
pitch 2.0-1x12
1
2
3
4
5
6
7
8
9
10
11
12
SCL_EEPROM
Test mode => 1-2 short to GND
Functional mode => 2-3 short
R3 0R RES1005
R6 0R RES1005
R9 0R RES1005
R8 0R RES1005
R4 0R RES1005
R11 0R RES1005
R10 0R RES1005
NS_UARTD
FUNC4
WL_UART_DBG
WL_EN2
WL_RS232_TX
WL_RS232_RX
WL_EN1
J2
HEADER 1x 3
pitch 2.0-1x3
1
2
3
EM Connector
R12 NL_0R RES1005
EXT_32KHz
U1
WG1300-00
E-N46_13.5X16.3_TOP
WL_UART_DBG
4
NS_UARTD
2
WL_EN1
7
WL_EN2
5
FUNC4
3
WL_RS232_TX
6
WL_RS232_RX
8
EXT_32K
21
GND
25
GND
9
SCL_CC3000
30
SCL_EEPROM
29
SDA_C C3000
28
SDA_EEPROM
27
GND
22
SPI_IRQ
14
SPI_DOUT
13
SPI_CS
12
SPI_CLK
17
SPI_DIN
15
VBAT_SW_EN
26
VBAT_IN
19
RF_ANT
35
GND
31
GND
33
GND
16
GND
34
VIO_H OST
23
GND
32
GND
37
GND
38
GND
39
GND
40
GND
41
GND
42
GND
43
GND
44
GND
46
GND
45
GND
1
GND
18
GND
10
GND
20
VIO_SOC
24
GND
11
GND
36
R5 0R RES1005
VBAT_SW_EN
R13 0R RES1005
R7 NL_1K RES1005
Internal 32kHz => R13 short to GND
External 32kHz => R12 short
VIO_H OST
J6
SFM-110-02-L-D-A
pitch 1.27-2x10
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
R2 0R RES1005
SDA_CC300
SDA_EEPROM
C5
1uF
CAP1005
J7
SFM-110-02-L-D-A
pitc h 1.27-2x10
1
3
5
7
9
11
13
15
17
19
2
4
6
8
10
12
14
16
18
20
Connect to RF1
Header for Debug
J5
NL_HEADER 1x11
pitc h 2.0-1x11
1
2
3
4
5
6
7
8
9
10
11
Connect to RF2
Test mode => R7 - 1K to PU
Figure 4. Schematics of WG1300-00 EM Board