User's Manual

Doc No: WG1300-00 EM Board-UG-D01
Copyright © JORJIN TECHNOLOGIES INC. 2012
http://WWW.JORJIN.COM.TW
CONFIDENTIAL
Page 4
for normal operation
7 GND Ground
8 WL_SPI_CS I Host interface SPI Chip Select
9 WL_SPI_DOUT O Host interface SPI Data Ouput
10 WL_SPI_IRQ O Host Interface SPI Interrupt Request
11 WL_SPI_DIN I Host Interface SPI Data Input
12 WL_SPI_CLK I Host interface SPI Clock input
Table 2. TOP-Side J4 of WG1300-00 EM Board
Table 3 below shows the signal descriptions of J5
Pin
Number
Pin Name Pin Type Descriptions
1 SCL_CC3000 O
I2C Clock signal output from CC3000. This
pin is connected to SCL_EEPROM via a
0-Ohm resister and is not used by end
users.
2 SCL_EEPROM I
I2C Clock signal input from EEPROM inside
CC3000-WG1300-00 SiP Module. This pin is
connected to SCL_CC3000 via a 0-Ohm
resister and is not used by end users.
3 SDA_CC3000 I/O
I2C Data signal from CC3000. This pin is
connected to SDA_EEPROM via a 0-Ohm
resister and is not used by end users.
4 SDA_EEPROM I/O
I2C Data signal from EEPROM inside
CC3000-WG1300-00 SiP Module. This pin is
connected to SDA_CC3000 via a 0-Ohm
resister and is not used by end users.
5 VBAT_SW_EN I Active-high enable signal from Host
device.
6 GND Ground
7 GND Ground
8 VIO_HOST PI
VIO power supply from HOST to Module.
For MSP430 Host platform,
VIO_HOST=VBAT_IN. For other platforms
which have different voltage levels from