User Guide

User Guide
iolinker Evaluation Board JI11x-81L-B
1 Features
Figure 1: Product illustration
The evaluation board for the JI11x-81L chips is a Lattice MachXO3 FPGA board with 49
GPIOs.
FPGA LCMXO3L-4300E-5UWG81CTR50
Supply voltage 3.3 V – 5 V, MicroUSB for power supply available
VCC_IO 3.3 V with internal voltage regulator, can be manually changed to 1.2 V – 3.465 V
VCC_core 1.2 V with internal voltage regulator
JTAG port Yes, compatible with Lattice JTAG cables
GPIO list P1 - P49 freely usable as GPIOs, INT is a freely usable GPIO meant for interrupt
signals, COM1-4 are GPIOs meant for communication interface usage (e.g. UART,
SPI or I2C), IN1-7 GPIOs for address encoding and hard-wired to GND, EN meant as
reset pin
Table 1: Hardware feature list
For details on the preprogrammed software, please refer to the iolinker chip datasheet.
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 2017 jInvent. The specifications and information herein are subject to change without notice.
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