Data Sheet

iolinker Family Data Sheet
2 Interfaces
2.1 UART
The Universal Asynchronous serial Receiver and Transmitter (UART) is a serial communica-
tion device. The configuration used is as follows:
Baud rate: 115200
8 data bits, 1 stop bit
Parity: None
LSB first
Note that this UART bus requires an external pull-up on its open collector TX
line, as described in section 9.1.3.
A connection diagram can be seen in figure 1.
COM2
COM3
RX
TX
uCJ111−100
COM4
COM1
Vcc
Rp
Figure 1: UART interface connection diagram
2.2 SPI
Max. frequency: 4 MHz
CPOL=0, CPHA=0 (SPI mode 0)
MSB first
When the device is addressed, the master pulls the SS line low to initiate communication
with the slave. The SS will be driven high to indicate the end of the current transaction.
A connection diagram can be seen in figure 2.
c
2017 jInvent. The specifications and information herein are subject to change without notice.
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