Data Sheet

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iolinker Family Data Sheet

9.5 CABGA-256

Pin Designation Note Pin Designation Note

A1 VCC – J1 P93 GPIO

A2 NC – J2 P94 GPIO

A3 IN1 Slave address[0] LSB J3 P95 GPIO

A4 IN2 Slave address[1] J4 P96 GPIO

A5 IN3 Slave address[2] J5 P97 GPIO

A6 IN4 Slave address[3] J6 P98 GPIO

A7 IN5 Slave address[4] J7 VCCIO –

A8 CLK Optional J8 GND –

A9 IN6 Slave address[5] J9 GND –

A10 IN7 Slave address[6] MSB J10 VCCIO –

A11 EN Chip enable, pull low

to activate

J11 P99 GPIO

A12 INT Interrupt output J12 P100 GPIO

A13 P1 GPIO J13 P101 GPIO

A14 P2 GPIO J14 P102 GPIO

A15 P3 GPIO J15 P103 GPIO

A16 VCC – J16 P104 GPIO

B1 P4 GPIO K1 P105 GPIO

B2 GND – K2 P106 GPIO

B3 P5 GPIO K3 P107 GPIO

B4 P6 GPIO K4 P108 GPIO

B5 P7 GPIO K5 P109 GPIO

B6 P8 GPIO K6 P110 GPIO

B7 P9 GPIO K7 VCC –

B8 P10 GPIO K8 VCCIO –

B9 P11 GPIO K9 VCCIO –

B10 P12 GPIO K10 VCC –

B11 P13 GPIO K11 P111 GPIO

B12 P14 GPIO K12 P112 GPIO

B13 P15 GPIO K13 P113 GPIO

B14 P16 GPIO K14 P114 GPIO

B15 GND – K15 P115 GPIO

B16 P17 GPIO K16 P116 GPIO

C1 P18 GPIO L1 P117 GPIO

C2 P19 GPIO L2 P118 GPIO

C3 GND – L3 P119 GPIO

C4 P20 GPIO L4 P120 GPIO

C5 P21 GPIO L5 P121 GPIO

Table 23: Pin description CABGA-256

c

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