Specifications

Shenzhen Smart-Core Link Technology Limited
- 3 -
5
PB6
I/O
24/
8
GPIO
AMUX1L ： Analog Channel1 Left;
SPI2CLKA：SPI2 Data Out(A); IIC_SCL_C：
IIC SCL(C);
ADC8 ： ADC Input Channel 8;
TMR3：Timer3 Clock Input;
UART1TXA：Uart1 Data Out(A);
6
PB4
I/O
24/
8
GPIO
SPI0_DAT2A(2)：SPI0 Data2 Out_A(2);
ADC7 ： ADC Input Channel 7;
CLKOUT1
UART2TXC：Uart2 Data Out(C);
UART2RXC：Uart2 Data In(C);
7
LDO_IN
P
/
Battery Charger In
PB5
I/O
8
GPIO
(High Voltage
Resistance)
SPI2DIA：SPI2 Data Input(A)； PWM3：
Timer3 PWM Output ； CAP1 ： Timer1
Capture; UART0TXC：Uart0 Data Out(C)；
UART0RXC：Uart0 Data In(C);
8
VBAT
P
/
Battery Power Supply
9
VDDIO
P
/
IO Power 3.3v
10
PB3
I/O
/
GPIO
SD0DAT_D：SD0 Data(D);
ADC6：ADC Input Channel 6;
PWM2：Timer2 PWM Output；UART2RXB：
Uart2 Data In(B);
11
PB2
I/O
8
GPIO(High
VoltageResistan
ce)
SD0CMD_D：SD0 Command(D)SPI1DIA：
SPI1 Data In(A);CAP0：Timer0
Capture;UART2TXB Uart2 Data Out (B)
12
PB1
I/O
24/8
GPIO(pull up)
SPI1DOA：SPI1 Data Out(A);ADC5：ADC
Input Channel 5;TMR2：Timer2 Clock
Input;UART0RXB：Uart0 Data
In(B);SPDIF_IN_D：Sony/Philips Digital
Interface Input(D)
13
DACVSS
P
/
DAC Ground
14
PA0
I/O
/
SDPG：SD Power SupplyALNK_DAT0_A：
Audio Link Data0_A;ALNK_DAT0_B：Audio
Link Data0_B;ADC0：ADC Input Channel
0;CLKOUT0 UART1TXC：Uart1 Data
Output(C)；