Wiring Diagram

Jiangsu JWT Electronics Shares CO.,Ltd.
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Table 11-7
RSSI value Register 0x11 Read only
Bit
Name
R
Description
Default
15-8
RAW_RSSI[7:0]
R
8 bit RSS value（Update in real time
and keep maximum value）
7-0
rssi_lat[7:0]
R
RSSI latch
Table 11-8
Block status Register 0x12 Read only
Bit
Name
R Description
Default
Optium
15-14
13
FIFO_FLAG
R 1: FIFO An empty or full mark bit
12
reserved
R
11
10
VCO_CAL_ERROR
R
1： VCO Calibration failure
9-0
Table 11-9
Main status Register 0x16 Read only
Bit
Name
R
Description
Default
Optium
15
CRC_error
R
1： CRC wrong 0: CRC correct
14
FEC23_error
R
1 ： FEC23 wrong 0: FEC23
correct
13-8
Framer_st
R
Framer state：
31H: ST_SLEEP
33H: ST_WAKE_UP.........
..........
7
Syncword_rev
R
1: Receiving syncword is valid
only in the receiving state
6
PKT_FLAG
R
Packet flag zone bit
5-3
Tx_st[2:0]
R
Transmit packet control state
000: TX_IDLE
001:TX_ID
010: TX_CRC
011: TX_DATA
110: TX_DONE
2-0
Rx_st[2:0]
R
Receive packet control state
000: RX_IDLE