Wiring Diagram

Jiangsu JWT Electronics Shares CO.,Ltd.
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before reset.
6-4
3
Auto-ack
R/W
1:Send an ACK after receiving the
data
0: After receiving the data, no ACK
is sent to enter IDLE directly
0
2
Pack_lenth_en
R/W
1: The first byte of the payload is
the package length
1
1
Fw_term_tx
R/W
0: The MCU controls when the TX
state is terminated
1: When FIFO writes a pointer equal
to read a pointer, the chip
automatically ends the TX state
1
0
SCRAMBLE_EN
R/W 0: scramble off 1: scramble on
1
Table 11-2
PA Power Control Register 0x02 default: 0x4060
Bit
Name
R/W Description
Default
15-12
reserved
R/W
0011
11-8
reserved
R/W
rev
0000
7-4
reserved
R/W
1000
3-0
PA_PW_SET[4:0]
R/W
PA output power control：
1111: min
1000: med
0000: max
0000
Table 11-3
Operation configuration Register 0x03 default: 0x5800
Bit
Name
R/W
Description
Default
15-13
Preamble_len[2:0]
R/W
000: 1 byte, 10101010
001: 2 byte, 10101010 10101010
111: 8 byte, 10101010 .............
010
12-11
Syncword_len[1:0]
R/W
00: 16 bits,{reg31[15:0]}
01: 32 bits, {reg31[15:0],
reg34[15:0]}
10: 48 bits, {reg31[15:0],
reg33[15:0], reg34[15:0]}
11: 64 bits, {reg31[15:0],
reg32[15:0], reg33[15:0],
reg34[15:0]}
11