Wiring Diagram

Jiangsu JWT Electronics Shares CO.,Ltd.
20 / 42
R
14
TX_FIFO_WR_PTR[
6]
R/W
TX FIFO Write the highest bit of the
pointer, when
fifo_share_en=1 valid
0
13-8
TX_FIFO_WR_PTR[
5:0]
R/W
TX FIFO Write down 6 bits
0
7
TXFIFO_CLR_R_PT
R
R/W
1: Empty RX FIFO read pointer
0
6
TX_FIFO_RD_PTR[
6]
R/W
TX FIFO Read the highest bit of the
pointer,when
fifo_share_en=1 valid
0
5-0
TX_FIFO_RD_PTR[
5:0]
R/W
TX FIFO Write down 6 bits
0H
Table 11-20
TX_FIFO_REG Register 0x27 default: 0x0000
Bit
Name
R/W
Description
Default
15-0
TX_FIFO_REG
R/W
MCU write FIFO Data interface
0000H
Table 11-21
RX_FIFO_REG Register 0x28 default: 0x0000
Bit
Name
R/W
Description
Default
15-0
RX_FIFO_REG
R/W
MCU read FIFO Data interface
0000H
Table 11-22
Twelve．Register default values and optimization
The chip has 42 registers, and after the reset, all registers are the default values, as shown in table
12 1. When working normally, you only need to optimize the values of a few registers, as shown in
Table 12, 2
Register default
Address
reset value
Address
reset value
0x00
0x0030
0x15
Read only
0x01
0x2077
0x16
Read only
0x02
0x3080
0x17
0x0000
0x03
0X5800
0x18
0x6FE1