Wiring Diagram

Table Of Contents

Jiangsu JWT Electronics Shares CO.,Ltd.

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write reg[0x1A] = 0x00f7;

write reg[0x18] = 0x6ffd;

write reg[0x27] = 0x1800;

write reg[0x01] = 0x207f;

write reg[0x0B] = 0x857f;

b、Empty the receiving FIFO

write reg[0x25] = 0x8080;

c、Start the receive enabled, and set the channel number

write reg[0x00] = 0x40XX; //Low 7 is channel number

d、Waiting PKT flag is high, said receives a frame data, this time can be read by reg0x16 [15]

to judge the CRC is correct (reg0x16 [15] = 0 means CRC is correct, if CRC error, the bit will be set

to "1", but once again into the receiving reg0x16 [15] will automatically reset), if the CRC is correct,

that received the correct data, the MCU can read the required data from the receive FIFO, read the

first byte of data length.

read reg[0x28]

。。。。。。。

Note: under the condition of CRC open but without an AUTO_ACK is open (chip reset after the

default state), in the process of receiving PKT_flag raising is not affected by CRC is PKT_flag

raising cannot guarantee received packets must be correct, under certain conditions, even without

the sender sends data, the receiver receives the noise or interference can be just and

synchronization code matching thus raising PKT flag. Therefore, the PKT flag pulls high but if the

CRC is incorrect, it should be re-entered into the receiving process (clear FIFO, enabling it to

receive... ).