Wiring Diagram

Jiangsu JWT Electronics Shares CO.,Ltd.
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15
FIFO_share_en
R/W
1: RX/TX FIFO share，overall length
64bytes
0： RX/TX FIFO Unshare，each
32bytes
1
14:0
Table 11-17
FIFO threshold_reg Register 0x24 default: 0x4401
Bit
Name
R/W
Description
Default
15-11
FIFO_empty_thres
hold
R/W
Think of FIFO as an empty
threshold
01000
10-6
FIFO_full_threshol
d
R/W
Think FIFO is full threshold
10000
5-0
Synword_threshol
d
R/W
Consider the correct threshold of
syncword,
XX means wrong XX bit is also
considered correct
000001
Table 11-18
RX_FIFO_RD_PTR Register 0x25 default: 0x0000
Bit
Name
R/W
Description
Default
15
RXFIFO_CLR_W_P
TR
R/W
1: Empty RX FIFO to write a pointer
0
14
RX_FIFO_WR_PTR
[6]
R/W
RX FIFO Write the highest bit of the
pointer, when
fifo_share_en=1 valid
0
13-8
RX_FIFO_WR_PTR
[5:0]
R/W
RX FIFO Write down 6 bits
0
7
RXFIFO_CLR_R_PT
R
R/W
1: Empty RX FIFO read pointer
0
6
RX_FIFO_RD_PTR[
6]
R/W
RX FIFO Read the highest bit of the
pointer,when
fifo_share_en=1 valid
0
5-0
RX_FIFO_RD_PTR[
5:0]
R/W
RX FIFO Read pointer low 6 bits
0H
Table 11-19
TX_FIFO_RD_PTR Register 0x26 default: 0x0000
Bit
Name
R/W
Description
Default
15
TXFIFO_CLR_W_PT
R/W
1: Empty TX FIFO to write a pointer
0