Data Sheet
Page 97
nRF51822 Product Specification v3.1
11.6 CDAB WLCSP package
Documentation for the CDAB WLCSP package reference circuit, including Altium Designer files, PCB layout
files, and PCB production files, can be downloaded from www.nordicsemi.com.
11.6.1 CDAB WLCSP schematic with internal LDO setup
Figure 31 CDAB WLCSP with internal LDO setup
Note: For PCB reference layouts, see the Reference Layout section on the Downloads tab for the
different chip variants on www.nordicsemi.com.
RF
VCC_nRF
P0.14
P0.13
P0.12
P0.08
P0.09
P0.10
P0.11
VCC_nRF
C8
100nF
C9
1.0nF
P0.17
P0.18
P0.19
P0.15
P0.16
SWDCLK
SWDIO
P0.04
P0.03
P0.02
P0.30
P0.00
P0.01
P0.05
P0.06
P0.07
P0.20
C10
47nF
P0.31
C1
12pF
C2
12pF
X1
16MHz
C11
100nF
VCC_nRF
C7
100nF
C3
2.2nF
P0.24
P0.25
P0.21
P0.23
P0.22
P0.28
P0.29
C14
12pF
C13
12pF
X2
32.768kHz
XL2
XL1
Optional
ANT1
A3
ANT2
B3
VDD_PA
A2
GND
B1
SE
A1
B1
BAL-NRF02D3
VDD
B8
VDD
G8
VSS
B1
VDD_PA
E1
ANT1
D1
ANT2
C1
VSS
B4
VSS
F4
AVDD
A1
XC1
A2
XC2
A3
nRF51x22
DCC
B9
P0.30
C8
P0.00
C9
P0.01
E7
P0.02
D9
P0.03
E9
P0.04
E8
P0.05
G9
P0.06
F8
P0.07
G7
P0.08
H8
P0.09
H7
P0.10
G6
P0.11
H6
DEC1
A4
P0.21
A5
P0.22
B5
P0.23
B6
P0.24
A6
P0.25
C5
P0.27
A8
P0.26
A7
P0.29
C7
P0.28
B7
P0.17
G3
P0.18
F3
P0.19
F2
P0.20
G1
DEC2
F1
P0.12
H5
P0.13
G5
P0.14
G4
P0.15
H4
SWDIO/nRESET
H2
SWDCLK
G2
P0.16
H3
P0.31
D8
VSS
D7
VSS
F6
VSS
F9
U1
nRF51x22-CDAB