Data Sheet

Page 64
nRF51822 Product Specification v3.1
8.22 Non-Volatile Memory Controller (NVMC) specifications
Flash write is done by executing a program that writes one word (32 bit) consecutively after the other to the
flash memory.
The program doing the flash writes could be set up to run from flash or from RAM. The timing of one flash
write operation depends on whether the next instructions following the flash write will be fetched from
flash or from RAM. Any fetch from flash done before the write operation is finished will give t
WRITE,FLASH
timing.
The flash memory is organized in 256 byte rows starting at CODE and UICR start address. Crossing from one
row to another will affect the flash write timing when running from RAM.
The time it takes to program the flash memory will depend on different parameters:
• Whether the program doing the flash write is running from RAM or running from flash.
• When running from RAM we will have different timing for:
• First write operation.
• Repeated write operations within the same row.
• Repeated write operation that are crossing from one row to another.
Table 61 NVMC specifications
Symbol Description Note Min. Typ. Max. Units
Tes t
level
t
ERASEALL
Erase flash memory.
1, 2
1. Max timing is assuming using RC16M, worst case tolerance.
2. The CPU will be halted for the duration of NVMC operations if the CPU tries to fetch data/code from the flash memory.
22.3 ms 1
t
PAGEERASEALL
Erase page in flash memory.
1, 2
22.3 ms 1
t
WRITE,FLASH
Program running from flash.
Write one word to flash memory.
1, 3
3. The CPU will be halted for the duration of NVMC operations.
46.3 µs 1
t
WRITE,RAM,1st
Program running from RAM. Write
the first word to flash memory.
1
39.3 µs 1
t
WRITE,RAM,2nd
Program running from RAM.
Repeated writes operations
following the first, within the
same row.
1
22.3 µs 1
t
WRITE,RAM,3rd
Program running from RAM.
Repeated write operation, new
word is located on a different row
compare to the previous write.
1
46.3 µs 1