INVADRtm IP1HPV Data Transceiver Owner’s Manual Date Prepared: October 25, 2001 (Revised: September 24, 2001) Document Control #: DC-42 Version: C-2 (Special Release) Copyright 2001 IPMobileNet, Inc.
TABLE OF CONTENTS SECTION 1: THEORY OF OPERATION ................................................................................. 3 General Block Diagram................................................................................................ 3 General Block Diagram Definitions..................................................................... 3 Microcontroller .................................................................................................... 5 Support Circuitry .................
SECTION 1: THEORY OF OEPRATION General Block Diagram DATA MicroController Injection Synthesizer Transmitter Transmit Processing Baseband Routing Receiver 1 Input / Output Modem Receiver 2 General Block Diagram Definitions For increased data security, the modem supports the U.S. Government developed Digital Encryption Standard (DES) data encryption and decryption protocols.
SECTION 1: THEORY OF OPERATION The modem supports a 115.2 Kbps data transmission rate on the serial port, SLIP protocol, and up to 19.2 Kbps over-the-air rate. Within a single chip it provides forward error detection and correction, bit interleaving for more robust data communications, and third generation collision detection and correction capabilities. Injection Synthesizer Provides programmable, ultra stable signals for the radio.
SECTION 1: THEORY OF OPERATION IP1 HPV Data Transceiver Section Descriptions The IP1 Data Transceiver works within a frequency range of 135 to 175 MHz. This section provides detailed descriptions of each of the sections within the IP1 HPV Data Transceiver. Refer to Appendix A to view the IP1 HPV Data Transceiver Circuit Board Diagram.
SECTION 1: THEORY OF OPERATION (870MODE line), it provides a serial interface for the MDT-870. Notice that only the RX data (RXD) and all handshake lines are buffered. Transmit data (TXD) is derived from a modem interface circuit. Injection Synthesizer The dual synthesizer chip (U38) is the major contributor of the injection synthesizer. This device contains the key components of a phase locked loop (PLL), including a prescaler, programmable divider, and phase detector.
SECTION 1: THEORY OF OPERATION Receiver 1 IF This section consists of 1 IF subsystem. The major contributor of the IF subsystem (U33) a complete 45 MHz superheterodyne receiver chip incorporating a mixer/oscillator, two limiting intermediate frequency amplifiers, quadrature detector, logarithmic received signal strength indicator (RSSI), voltage regulator and audio and RSSI op amps (U33).
SECTION 1: THEORY OF OPERATION Power and Analog Ground These sections consist of the power supplies and transmit control circuitry. Power from the vehicle’s battery appears at VBATT. Diode D1 protects the voltage regulators by clamping any transient spikes on the supply line. Such spikes typically occur while the engine is started.
SECTION 1: THEORY OF OPERATION VLogic and Digital Ground The VLogic and Digital Ground section consists of a pulse-width modulation (PWM) step-down DC-DC converter (U20) that provides an adjustable output. It also reduces noise in sensitive communications applications and minimizes drop out voltage. An external Schottky diode (D2) is required as an output rectifier to pass inductor current during the second half of each cycle to prevent the slow internal diode of the N-channel MOSFET from turning on.
SECTION 2: FACTORY TEST PROCEDURE Equipment List The following table lists the equipment required to perform the IP1 HPV Mobile Radio Factory Test Procedure: QTY 2 1 DESCRIPTION MANUFACTURER PC’s One for Mobile One for Base Service Monitor – Communication Test Set Windows 9X w/ IPMessage AVR MODEL HP HP890 or equivalent Tektronix Fluke 77 or equivalent Astron VS12M or equivalent Tektronix TDS 460A Pasternack PE7021-40 or equivalent 1 Digital multi-meter 1 DC power supply w/ ammeter, 13.
SECTION 2: FACTORY TEST PROCEDURE Programming and Configuring Mobile Radio Once the appropriate equipment for performing the factory test are gathered, perform the following steps to program and configure an IP1 HPV Mobile Radio: Step 1 Enter the following information on the Mobile Radio Performance Test Data Sheet: Radio Serial number Date test being performed Tester's Name Step 2 Program the radio to the current Firmware revision using the AVR programming utility.
SECTION 2: FACTORY TEST PROCEDURE Adjustment / Alignment Procedures Receiver Injection Perform the following steps to adjust the receiver injection and injection frequency: Step 1 While monitoring the receiver injection frequency at RXINJ1, adjust potentiometer RV3 for minimum frequency error of +/- 100Hz. Record this value on the Mobile Radio Performance Test Data Sheet. Step 2 While monitoring the 44.
SECTION 2: FACTORY TEST PROCEDURE Receiver 2 Perform the following steps to adjust receiver 2: Step 1 Inject an on-frequency carrier signal with an amplitude of -80 dBm, modulated with a 1 kHz test tone at +/- 5.0 kHz deviation into Receiver 2's antenna port. Step 2 While monitoring the voltage at RSSI2 Test Point with a DMM, adjust the two (2) poles of filter FL8 for the maximum RSSI voltage.
SECTION 2: FACTORY TEST PROCEDURE Transmit Data Perform the following steps to adjust transmit data: Step 1 Use IPMessage to set the transmit power to 0. Step 2 Using the x=2000,n command of IPMessage to generate transmit data messages while observing the transmitted signal on the HP RF communications test set, adjust pot R33 for minimum frequency error while transmitting data messages. Step 3 Turn potentiometer RV1 fully counterclockwise. Step 4 Adjust RV1 for deviation of 5.3 kHz.
SECTION 2: FACTORY TEST PROCEDURE Receive Data Perform the following steps to adjust the receive data: Step 1 Using the DOS ping command on the PC connected to the radio, ping the network controller to generate uplink and downlink data messages. The following command will generate one Hundred 500 character messages: >;Ping 192.168.3.3 -n 100 -l 500 Step 2 Observe the data quality readings on the IPMessage window of the PC connected to the radio using the V (for Verbose) command in the IPMessage program.
SECTION 2: FACTORY TEST PROCEDURE Step 5 Verify the timing characteristics are identical to the plots in the next section, Uplink Hardware Timing Verification. Step 6 At the base station monitor PC, verify that all the data quality readings are 240 and higher. Step 7 Move the scope probes to monitor the timing at the mobile radio as described in Downlink Hardware Timing Verification. Generate test messages by pinging the IPNC from the PC attached to the radio.
SECTION 2: FACTORY TEST PROCEDURE Uplink Hardware Timing Verification Figure 2-1 below displays an oscilloscope plot of an uplink data message from the mobile to the base station. Channel 1 is connected to the base station's RSSI (XXX-12), channel 2 is connected to the base station's recovered modulation (TP6), and channel 3 is connected to the base station's modem chip select line. The scopes acquisition mode is high-resolution.
SECTION 2: FACTORY TEST PROCEDURE Figure 2-2 displays another oscilloscope plot of an up-link data message from the mobile to the base station. As in the last plot, channel 1 is connected to the base station's RSSI (J5-12), channel 2 is connected to the base station's recovered modulation test point (TP6), and channel 3 is connected to the base station's modem chip select line (U16-13). The scope's acquisition mode is now in the peak detect mode.
SECTION 2: FACTORY TEST PROCEDURE Downlink Hardware Timing Verification Figure 2-3 displays a plot of the downlink timing characteristics. Channel 1 is connected to RSSI, channel 2 is connected to recovered audio, and channel 3 is connected to the modem CS pin. The scope is in the high-resolution acquisition mode. There is a very short period of quiet time (no modulation) followed by approximately 12 milliseconds of modem synchronization time (sync time).
SECTION 2: FACTORY TEST PROCEDURE The plot in Figure 2-4 is the same as before but now the scope is in the peak detect acquisition mode. After the mobile radio detects a step response in the RSSI (caused by a down-link transmission), the radio's microcontroller waits an amount of time equal to the programmed value of the "carrier detect delay time" then instructs the modem to look for frame sync.
SECTION 3: LABEL AND LABEL PLACEMENT INVADR IP1 HPV Data Transceiver FCC Label Placement INVADR IP1 HPV Data Transceiver FCC Label ~\Technical Documentation\System Manuals\FCC-Reports\IP1HPV\IP1HPV-FCCRpt.
APPENDIX A: CIRCUIT BOARD DIAGRAM IP1 HPV Data Transceiver Circuit Board ~\Technical Documentation\System Manuals\FCC-Reports\IP1HPV\IP1HPV-FCCRpt.
APPENDIX B: IP8 HPV TEST DATA SHEET Program and Configure Radio Date Serial Number Firmware Revision Tester Adjustment / Alignment Procedures Receiver Injection Parameter Spec Measured Injection Frequency Error at +/- 100 Hz RXINJ1(within +/- 100 Hz of exact injection frequency) U34 pin 4 power level -3 to -5 dBm Receiver 1& 2 Parameter Spec RSSI test point CV1 adjustment 2.8 to 3.0 VDC 2.5 VDC +/- 1mV Audio DC Amplitude (1 kHz Test tone @ 5.
APPENDIX B: IP8 HPV TEST DATA SHEET Transmit Section Parameter Spec Transmit Modulation Deviation (5.3 kHz while transmitting 2000 character test message) Transmit Data Quality (While transmitting 2000 character test messages to the base station) Transmit Frequency Error (Transmitting 2000 character test message) Measured 5.
APPENDIX B: IP8 HPV TEST DATA SHEET Data Quality Parameter Spec Measured Receiver 1 Data Quality (While receiving 500 character "pings" from base station, 100 pings min, no errors allowed, CRC errors enabled) 240> Receiver 2 Data Quality (While receiving 500 character "pings" from base station, 100 pings min, no errors allowed, CRC errors enabled) 240> Final Tests Uplink Final Parameter Transmit Frequency Error Spec Measured +/- 500 Hz (Transmitting 19, 2000 character test message) Transmit Modul
APPENDIX B: IP8 HPV TEST DATA SHEET Downlink Final Parameter Spec Measured Downlink Hardware Timing Verification Sync start ( RSSI to CS first going low) 3.0 +/- 0.5ms Recovered Modulation Levels 800 mV~ 2.5VDC~ Frame Sync (From end of Sync to CS second time going low) 3.2 +/- 0.
