User Manual

SECTION 1: THEORY OF OPERATION
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This section is identical to the Receiver 1 IF with the exception of the local oscillator circuitry.
Incoming 45 MHz signals appearing at 2NDIF pass through an amplifier and an LC matching circuit
mixer. Local oscillator injection is provided by the Receiver 1 IF subsystem. The mixer output passes
through a 455 KHz ceramic filter (FL6B). It is then amplified and passed through another ceramic filter
(FL7B) to a second gain stage. The IF output drives a quadrature detector. The recovered audio
appears at pin 9 of U8B. The RSSI detector converts if the amplifier current is generated inside the chip
into a DC level corresponding logarithmically to the signal strength. RSSI is used by the Diversity
Reception Controller to select the Receiver with the better quality signal.
Modem
The IP uses a single-chip modem circuit (U49) that converts parallel data to an analog audio waveform
for transmission and analog audio from a receiver to serial data. In addition to the modem functions, U49
provides forward error correction and detection, bit interleaving for more robust data communications, and
third generation collision detection and correction capabilities.
The microcontroller section controls the Modem operation. Address bus (A0 and A1), address/data bus
(A0-A7), and control lines (RD*, WR*, MODEMCS*) operate the Modem chip. The Modem circuitry
requires a crystal-controlled clock, consisting of crystal Y5 and an internal Pierce oscillator.
Incoming audio from the baseband routing circuit appears on the DISCAUD input. The audio signal is
demodulated into digital data appearing on the AD0-AD7 lines when the MODEMCS* and RD* lines are
low. The data goes to the microcontroller section for further processing, and then to the input/output
section for conversion to RS232 signal levels. At this point, the received data is available to the user’s
MDC and VIU.
During a transmission, outgoing data appearing on the AD0-AD7 lines is converted into a 4-level FSK
audio signal by the modem chip. This operation takes place when the MODEMCS* and WR* lines are
low. Data from the user’s MDC or VIU passes through the input/output section and microcontroller
section to the AD0-AD7 bus.
This modem supports 115.2 KBPS (serial port) and 19.2 KBPS or 9600 KBPS (over-the-air) data
transmission rates.