User's Manual

SECTION 1: THEORY OF OPERATION
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A regulator (VR2) powers the T/R switch circuitry. When the System Controller Board makes TXKEY*
low, inverter U6D goes high, turning on transistor Q2 and FET Q1. This applies 5-volt power to the
TXENABLE output, turning on the T/R switch on the Power Amplifier Board. At the same time, transistor
Q3 conducts, grounding the KEY* input of the Power Amplifier Board. Finally, inverter U6C goes high
and turns on RF switch U1, connecting the VCO output to the Power Amplifier Board for transmission.
The power supply consists of two (2) voltage regulators. A regulator (VR1) provides 9-volt power for the
VCO. Another regulator (U11) provides low noise 5-volt power for the logic circuitry, synthesizer chip,
and analog circuitry.
Analog Modulation
This section displays the analog modulation circuitry. Incoming modem audio from the System Controller
Board appears at TXMOD, and is buffered by op amp U5C. If an external modulation source (modem or
amplified microphone) is connected to the base station’s DB9 connector, audio appears at EXTMOD.
From there the audio passes through low pass filter U10. The audio is inverted and amplified by an op
amp (U5D). It then passes on to the VCO module via VCOMOD. Pot R42 adjusts the level to suit the
VCO.
The 10 MHz reference is also modulated in order to counteract the corrective effects of the synthesizer
loop circuitry. For example, if only the VCO were modulated, the synthesizer would try to compensate for
the frequency “error,” caused by the modulation. This effectively reduces the amount of modulation
available. Modulating the reference and the VCO simultaneously deceives the loop into not
compensating for the modulation, because when the reference frequency goes high, the VCO frequency
goes high, and vice-versa.
An op amp (U9A) amplifies the AUDIO output from another op amp (U5D) and applies it to jumper block
JMP1. Pot R30 adjusts the gain of U9A. Op amp (U9B) inverts the phase of the audio and applies it to
the other side of jumper block JMP1. The purpose of the jumper block is to select the proper phase of the
audio. If the wrong phase is used, on modulation peaks the reference will swing in the same direction as
the VCO, canceling out most of the modulation. The output from the jumper block goes to the 10 MHz
reference via REFMOD.
The VBIAS input is a 2.5-volt DC source, which biases the op amps to the correct operating point. It is
generated by modem chip (U14) on the System Controller Board.
Phase Locked Loop
This section displays phase locked loop (PLL) circuitry. The 10-MHz reference (Y1), runs synthesizer
(U2), which in turn controls VCO VCO1. The main section of this board is the synthesizer chip (U2). The
device contains the key components of a PLL, including a 1.1 GHz prescaler, programmable divider, and
phase detector.
In operation, the desired frequency is loaded into U2 as a clocked serial bit stream via the CLK and DATA
inputs. The lock detection circuitry consists of inverters U6A and U6B, diode CR1, and resistor R1.
When the synthesizer is in lock, the LD pin on U2 is high, making the EXCLD output on terminal block
(TB1) high. The EXCLD output on TB1 routes the lock detect output from the Exciter Board. This
configuration tells the CPU on the System Controller Board that it is acceptable to process received data,
or to key the transmitter when LD is high. Otherwise, if a fault in either synthesizer prevents a lock,
receive and transmit operation will be inhibited.
The switch (JMP1) is used to select the supply voltage to chip U2. The UHF injection signal is generated
by module VCO1. This device is a wide-range voltage controlled oscillator (VCO). A voltage on the VT