Product Description

nanoBTS Product Description Software Implementation (informative)

Block based tasks execute every four frames, again, at the conclusion of each timeslot and

include

• L2 block transfer from DLP

• Channel coding and interleaving

• Viterbi decoding of soft-decision results from equaliser

• L2 block transfer to ULM/ULS

Block based tasks run at lower priority than frame based tasks, and are usually interrupted

by them.

6.5 Interprocess Communications and Synchronisation

(139/140 units)

Software processes within the ARM7 and MPC855T processors communicate with each

other exclusively using messages written to and read from OS maintained inter-process

message queues. Other methods of interprocess communications (such as semaphores

or shared memory) are not used.

The one exception to this rule is the communication between DSP and ARM. Software

running on the DSP core reads its data on interrupt generated by the TCU from dual-port

memory shared with the ARM.