Users Manual

PN17TR 915MHz Transceiver Module Inventis Technology Pty Ltd
Unit 4, 2 Southridge St. Eastern Creek NSW, Australia Page 12
4
0
R0
Not Used.
3
CRC_AUTOFLUSH
0
R/W
Enable automatic flush of RX FIFO when CRC is not
OK. This requires that only one packet is in the
RXIFIFO and that packet length is limited to theRX
FIFO size.
2
APPEND_STATUS
1
R/W
When enabled, two status bytes will be appended to
the payload of the packet. The status bytes contain
RSSI and LQI values, as well as CRC OK.
1:0
ADR_CHK[1:0]
0 (00)
R/W
Controls address check configuration of received
packages.
Setting
Address check configuration
0 (00)
1 (01)
2 (10)
3 (11)
No address check
Address check, no broadcast
Address check and 0 (0x00)
broadcast Address check and 0
(0x00) and 255 (0xFF) broadcast
0x08: PKTCTRL0 – Packet Automation Control
Bit
Field Name
Reset
R/W
Description
7
R0
Not used
6
WHITE_DATA
1
R/W
Turn data whitening on / off
0: Whitening off
1: Whitening on
5:4
PKT_FORMAT[1:0]
0 (00)
R/W
Format of RX and TX data
Setting
Packet format
0 (00)
1 (01)
2 (10)
3 (11)
Normal mode, use FIFOs for RX and
TX
Synchronous serial mode, Data in on
GDO0 and data out on either of the
GDOx pins
Random TX mode; sends random
data using PN9 generator. Used for
test. Works as normal mode, setting
0 (00), in RX
Asynchronous serial mode, Data in
on GDO0 and data out on either of
the GDOx pins
3
0
R0
Not used
2
CRC_EN
1
R/W
1: CRC calculation in TX and CRC check in RX enabled
0: CRC disabled for TX and RX