Data Sheet

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FN2867 Rev 1.00 Page 1 of 13

June 28, 2016

FN2867

Rev 1.00

June 28, 2016

ICM7555, ICM7556

General Purpose Timers

DATASHEET

The ICM7555 and ICM7556 are CMOS RC timers providing

significantly improved performance over the standard

SE/NE 555/556 and 355 timers, while at the same time being

direct replacements for those devices in most applications.

Improved parameters include low supply current, wide

operating supply voltage range, low Threshold, Trigger

and

Reset

currents, no crowbarring of the supply current during

output transitions, higher frequency performance and no

requirement to decouple Control Voltage for stable operation.

Specifically, the ICM7555 and ICM7556 are stable controllers

capable of producing accurate time delays or frequencies. The

ICM7556 is a dual ICM7555, with the two timers operating

independently of each other, sharing only V+ and GND. In the

one shot mode, the pulse width of each circuit is precisely

controlled by one external resistor and capacitor. For astable

operation as an oscillator, the free running frequency and the

duty cycle are both accurately controlled by two external

resistors and one capacitor. Unlike the regular bipolar

SE/NE 555/556 devices, the Control Voltage terminal need not

be decoupled with a capacitor. The circuits are triggered and

reset on falling (negative) waveforms, and the output inverter

can source or sink currents large enough to drive TTL loads, or

provide minimal offsets to drive CMOS loads.

Features

• Exact equivalent in most cases for SE/NE 555/556 or

TLC555/556

• Low supply current

- ICM7555 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60µA

- ICM7556 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 120µA

• Extremely low input currents . . . . . . . . . . . . . . . . . . . . . . 20pA

• High speed operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1MHz

• Guaranteed supply voltage range . . . . . . . . . . . . . . 2V to 18V

• Temperature stability . . . . . . . . . . . . . 0.005%/°C at +25°C

• Normal reset function - no crowbarring of supply during

output transition

• Can be used with higher impedance timing elements than

regular 555/556 for longer RC time constants

• Timing from microseconds through hours

• Operates in both astable and monostable modes

• Adjustable duty cycle

• High output source/sink driver can drive TTL/CMOS

• Outputs have very low offsets, HIGH and LOW

• Pb-free (RoHS Compliant)

Applications

•Precision timing

•Pulse generation

• Sequential timing

•Time delay generation

•Pulse width modulation

• Pulse position modulation

• Missing pulse detector

Pin Configurations

ICM7555

(8 LD PDIP, SOIC)

TOP VIEW

ICM7556

(14 LD PDIP, CERDIP)

TOP VIEW

GND

TRIGGER

OUTPUT

RESET

DISCHARGE

THRESHOLD

CONTROL

VOLTAGE

DISCHARGE1

CONTROL

RESET1

OUTPUT1

TRIGGER1

GND

DISCHARGE2

THRESHOLD2

CONTROL

RESET2

OUTPUT2

TRIGGER2

VOLTAGE2

VOLTAGE1

THRESHOLD1

Summary of content (13 pages)

PAGE 1
DATASHEET ICM7555, ICM7556 FN2867 Rev 1.00 June 28, 2016 General Purpose Timers The ICM7555 and ICM7556 are CMOS RC timers providing significantly improved performance over the standard SE/NE 555/556 and 355 timers, while at the same time being direct replacements for those devices in most applications.
PAGE 2
ICM7555, ICM7556 Ordering Information PART NUMBER PART MARKING TEMP. RANGE (°C) TAPE AND REEL (UNITS) PACKAGE (RoHS COMPLIANT) ICM7555CBAZ (Notes 2, 3) 7555 CBAZ 0 to +70 ICM7555CBAZ-T (Notes 1, 2, 3) 7555 CBAZ 0 to +70 ICM7555IBAZ (Notes 2, 3) 7555 IBAZ -25 to +85 ICM7555IBAZ-T (Notes 1, 2, 3) 7555 IBAZ -25 to +85 ICM7555IPAZ (Notes 2, 3) 7555 IPAZ -25 to +85 8 Ld PDIP E8.3 ICM7556IPDZ (Notes 2, 3) ICM7556IPDZ -25 to +85 14 Ld PDIP E14.3 -55 to +125 14 Ld Cerdip F14.
PAGE 3
ICM7555, ICM7556 Absolute Maximum Ratings Thermal Information Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . +18V Input Voltage Trigger, Control Voltage, Threshold, Reset (Note 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V+ +0.3V to GND -0.3V Output Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PAGE 4
ICM7555, ICM7556 Electrical Specifications Applies to ICM7555 and ICM7556, unless otherwise specified. (Continued) (Note 8) -55°C TO+125°C TA = +25°C PARAMETER SYMBOL MIN TEST CONDITIONS TYP MIN 1.0 0.2 TYP MAX UNIT 1.2 V Reset Voltage VRST VDD = 2V to 15V Reset Current IRST VDD = 15V 10 50 nA Discharge Leakage IDIS VDD = 15V 10 50 nA Output Voltage VOL VDD = 15V, ISINK = 20mA 0.4 1.0 1.25 V VDD = 5V, ISINK = 3.2mA 0.2 0.4 0.
PAGE 5
ICM7555, ICM7556 Schematic Diagram P P P R VDD P THRESHOLD N N CONTROL VOLTAGE NPN R OUTPUT P P TRIGGER R N N N N N N RESET N GND DISCHARGE R = 100kΩ ±20% (TYP) FIGURE 2. SCHEMATIC DIAGRAM Application Information General The ICM7555 and ICM7556 devices are, in most instances, direct replacements for the SE/NE 555/556 devices. However, it is possible to effect economies in the external component count using the ICM7555 and ICM7556.
PAGE 6
ICM7555, ICM7556 VDD 1 VDD RA 8 2 7 OUTPUT 3 6 VDD 4 5 C tOUTPUT = -ln (1/3) RAC = 1.1RAC RA RB 1 8 TRIGGER 2 7 OUTPUT 3 RESET 4 ICM7555 DISCHARGE THRESHOLD 6 CONTROL VOLTAGE 5 OPTIONAL CAPACITOR OPTIONAL CAPACITOR C VDD ≤18V FIGURE 5. ALTERNATE ASTABLE CONFIGURATION FIGURE 6. MONOSTABLE OPERATION CONTROL VOLTAGE OUTPUT DRIVE CAPABILITY The output driver consists of a CMOS inverter capable of driving most logic families including CMOS and TTL.
PAGE 7
ICM7555, ICM7556 1200 MINIMUM PULSE WIDTH (ns) SUPPLY CURRENT (ICM7555) (µA) TA = +25°C 1100 1000 900 800 700 600 500 VDD = 2V 400 300 200 VDD = 5V 100 VDD = 18V 200 400 180 360 160 320 280 140 TA = -20°C 120 100 60 80 20 40 10 20 30 0 0 40 2 4 6 8 10 12 14 16 18 20 SUPPLY VOLTAGE (V) FIGURE 7. MINIMUM PULSE WIDTH REQUIRED FOR TRIGGERING FIGURE 8. SUPPLY CURRENT vs SUPPLY VOLTAGE 100 -0.
PAGE 8
ICM7555, ICM7556 (Continued) 8 100 TA = +25°C 6 DISCHARGE SINK CURRENT (mA) NORMALIZED FREQUENCY DEVIATION (%) Typical Performance Curves 4 2 RA = RB = 10MΩ C = 100pF 0 2 RA = RB = 10kΩ C = 0.1µF 4 6 8 0.1 1.0 10.0 TA = +25°C 10.0 VDD = 2V 1.0 0.1 0.01 100.0 0.1 FIGURE 13. NORMALIZED FREQUENCY STABILITY IN THE ASTABLE MODE vs SUPPLY VOLTAGE PROPAGATION DELAY (ns) VDD = 5V 500 400 300 TA = +70°C TA = +25°C TA = -20°C 0 0 10 20 30 40 +1.0 RA = RB = 10kΩ C = 0.1µF +0.9 +0.8 +0.
PAGE 9
ICM7555, ICM7556 Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted. Please go to the web to make sure that you have the latest revision. DATE REVISION June 28, 2016 FN2867.10 CHANGE Converted to new datasheet template. Updated 14 Ld PDIP “Pin Configuration” on page 1 by adding “1” or “2” to pins that have same name.
PAGE 10
ICM7555, ICM7556 Package Outline Drawing M8.15 8 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE Rev 4, 1/12 DETAIL "A" 1.27 (0.050) 0.40 (0.016) INDEX 6.20 (0.244) 5.80 (0.228) AREA 0.50 (0.20) x 45° 0.25 (0.01) 4.00 (0.157) 3.80 (0.150) 1 2 8° 0° 3 0.25 (0.010) 0.19 (0.008) SIDE VIEW “B” TOP VIEW 2.20 (0.087) SEATING PLANE 5.00 (0.197) 4.80 (0.189) 1.75 (0.069) 1.35 (0.053) 1 8 2 7 0.60 (0.023) 1.27 (0.050) 3 6 4 5 -C- 1.27 (0.050) 0.51(0.020) 0.33(0.013) SIDE VIEW “A 0.25(0.
PAGE 11
ICM7555, ICM7556 Dual-In-Line Plastic Packages (PDIP) E8.3 N E1 INDEX AREA 1 2 3 N/2 INCHES -B- -AE D BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 (JEDEC MS-001-BA ISSUE D) 8 LEAD DUAL-IN-LINE PLASTIC PACKAGE D1 B 0.010 (0.25) M C L eA A1 eC C A B S C eB NOTES: 1. Controlling Dimensions: INCH. In case of conflict between English and Metric dimensions, the inch dimensions control. MILLIMETERS SYMBOL MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.
PAGE 12
ICM7555, ICM7556 Dual-In-Line Plastic Packages (PDIP) N E14.3 (JEDEC MS-001-AA ISSUE D) E1 INDEX AREA 1 2 3 14 LEAD DUAL-IN-LINE PLASTIC PACKAGE N/2 INCHES -B- SYMBOL -AE D BASE PLANE -C- SEATING PLANE A2 A L D1 e B1 D1 B 0.010 (0.25) M A1 eC C A B S MILLIMETERS MIN MAX MIN MAX NOTES A - 0.210 - 5.33 4 A1 0.015 - 0.39 - 4 A2 0.115 0.195 2.93 4.95 - C L B 0.014 0.022 0.356 0.558 - eA B1 0.045 0.070 1.15 1.77 8 C 0.008 0.014 0.204 0.
PAGE 13
ICM7555, ICM7556 Ceramic Dual-In-Line Frit Seal Packages (CERDIP) LEAD FINISH c1 F14.3 (MIL-STD-1835 GDIP1-T14 (D-1, CONFIGURATION A) -D- -A- 14 LEAD CERAMIC DUAL-IN-LINE FRIT SEAL PACKAGE BASE METAL SYMBOL b1 M M (b) -Bbbb S C A-B S D BASE PLANE Q -C- SEATING PLANE A L S1  eA A A b2 b ccc M SECTION A-A D S C A-B S e D S eA/2 INCHES (c) E c aaa M C A - B S D S NOTES: 1.