Datasheet

4
FN3180.5
July 21, 2005
Functional Diagram
Sense Pin Input Threshold V
CL
-0.5- V
Input-Output Saturation
Resistance (Note 3)
R
SAT
V+
IN
= 2V, I
OUT1
= 1mA - 170 350 Ω
V+
IN
= 9V, I
OUT1
= 2mA - 50 100 Ω
V+
IN
= 15V, I
OUT1
= 5mA - 35 70 Ω
Load Regulation ∆V
OUT
∆I
OUT
1mA < I
OUT2
< 20mA - 1 3 Ω
50µA < I
OUT1
< 5mA - 2 10 Ω
Available Output Current
(V
OUT2
)
I
OUT2
3V ≤ V
IN
≤ 16V, V
IN
- V
OUT2
= 1.5V 40 - - mA
Negative Tempco Output
(Note 4)
V
TC
Open Circuit Voltage - 0.9 - V
I
TC
Maximum Sink Current 0 8 2.0 mA
Temperature Coefficient ∆V
TC
∆T
Open Circuit - +2.5 - mV/°C
Minimum Load Current I
L(MIN)
Includes V
SET
Divider T
A
= 25°C - - 1.0 µA
0°C < T
A
< 70°C - 0.2 5.0 µA
-25°C < T
A
< 85°C - 0.2 5.0 µA
NOTES:
3. This parameter refers to the saturation resistance of the MOS pass transistor. The minimum input-output voltage differential at low current (under
5mA), can be determined by multiplying the load current (including set resistor current, but not quiescent current) by this resistance.
4. This output has a positive temperature coefficient. Using it in combination with the inverting input of the regulator at V
SET
, a negative
coefficient results in the output voltage. See Figure 9 for details. Pin will not source current.
5. All pins are designed to withstand electrostatic discharge (ESD) levels in excess of 2000V.
6. All significant improvements over the industry standard ICL7663 are highlighted.
Electrical Specifications Specifications Below Applicable to Both ICL7663S and ICL7663SA, Unless Otherwise Specified. V+
IN
= 9V,
V
OUT
= 5V, T
A
= 25°C, Unless Otherwise Specified. Notes 4, 5. See Test Circuit, Figure 7 (Continued)
PARAMETER SYMBOL TEST CONDITIONS MIN TYP MAX UNITS
C
REF
B
A
V
OUT1
V
OUT2
SENSE
V
SET
V
TC
SHUTDOWN
GND
3
2
1
6
7
5
4
V+
IN
8
GND
ICL7663S