Datasheet

4
FN3093.3
FIGURE 1. ICL7135 TEST CIRCUIT FIGURE 2. ICL7135 DIGITAL LOGIC INPUT
FIGURE 3. ANALOG SECTION OF ICL7135
28
27
26
25
23
22
21
20
19
18
17
16
15
1
2
3
4
5
6
7
8
9
10
11
12
13
14
24
SET V
REF
= 1.000V
V
REF
IN
SIGNAL
-5V
+5V
100kΩ
27Ω
100kΩ
100K
ANALOG
GND
INPUT
1µF
0.47µF
1µF
0.1µF
100kΩ
ICL7135
0V
CLOCK
IN
120kHz
UNDERRANGE
OVERRANGE
STROBE
RUN/HOLD
DIGITAL GND
POLARITY
CLOCK IN
BUSY
LSD DI
D2
D3
D4
MSB B8
B4
V-
REF
ANALOG GND
INT OUT
A-Z IN
BUF OUT
REF CAP 1
REF CAP 2
IN LO-
IN HI+
V+
MSD D5
LSB B1
B2
V
+
PAD
DIG GND
C
REF+
REF HI
IN HI
INT
A/Z
ANALOG
AZ
IN LO
ZI
C
REF
BUFFER
COMMON
INPUT
COMPARATOR
C
AZ
C
INT
R
INT
INTEGRATOR
INPUT
V
+
V
-
POLARITY
ZERO-
LOW
HIGH
CROSSING
DETECTOR
F/F
DE(+) DE(-)
DE(-) DE(+)
AZ
AZ
AUTO
ZERO
INT
1
2
3
45611
10
9
87
-
+
-
+
+
C
REF
A/Z, DE(±), ZI
INT
ICL7135