Datasheet

3-77
NOTES:
11. Transistors Q
P1
, Q
P2
, Q
P3
and Q
N1
, Q
N2
, Q
N3
are parallel connected with Q
8
and Q
12
, respectively, of the CA3130.
12. See file number 619.
FIGURE 17. CMOS TRANSISTOR ARRAY (CA3600E) CONNECTED AS POWER BOOSTER IN THE OUTPUT STAGE OF THE CA3130
8
7
3
2
+15V
2kΩ
CA3130
+
-
4
1036
4 97
6
14
750kΩ
1µF
2 11
13 1
12
58
1µF
1MΩ
0.01µF
510kΩ
500µF
Q
P3
Q
N1
Q
N2
Q
N3
Q
P2
Q
P1
CA3600E
A
V(CL)
= 48dB
LARGE SIGNAL
BW (-3 dB) = 50kHz
R
L
= 100Ω
(P
O
= 150mW
AT THD = 10%)
(NOTE 12)
INPUT
Typical Performance Curves
FIGURE 18. OPEN LOOP GAIN vs TEMPERATURE
FIGURE 19. OPEN-LOOP RESPONSE
LOAD RESISTANCE = 2kΩ
150
140
130
120
110
100
90
80
-100 -50 0 50 100
OPEN LOOP VOLTAGE GAIN (dB)
TEMPERATURE (
o
C)
SUPPLY VOLTAGE: V+ = 15V; V- = 0
T
A
= 25
o
C
φ OL
3
2
1
1
2
3
4
4
AOL
1 - C
L
= 9pF, C
C
= 0pF, R
L
= ∞
2 - C
L
= 30pF, C
C
= 15pF, R
L
= 2kΩ
3 - C
L
= 30pF, C
C
= 47pF, R
L
= 2kΩ
4 - C
L
= 30pF, C
C
= 150pF, R
L
= 2kΩ
120
100
80
60
40
20
0
OPEN LOOP VOLTAGE GAIN (dB)
-100
-200
-300
OPEN LOOP PHASE (DEGREES)
10
2
10
3
10
4
10
5
10
6
10
7
10
8
FREQUENCY (Hz)
10
1
CA3130, CA3130A