Datasheet

3-74
FIGURE 12A. PEAK POSITIVE DETECTOR CIRCUIT FIGURE 12B. PEAK NEGATIVE DETECTOR CIRCUIT
FIGURE 12. PEAK-DETECTOR CIRCUITS
FIGURE 13. VOLTAGE REGULATOR CIRCUIT (0V TO 13V AT 40mA)
3
2
6
4
7
CA3130
+7.5V
0.01µF
+DC
OUTPUT
5µF
+
-
100
kΩ
1N914
0.01µF
-7.5V
2kΩ
10kΩ
+
-
6V
P-P
INPUT;
BW (-3dB) = 1.3MHz
0.3V
P-P
INPUT;
BW (-3dB) = 240kHz
3
2
6
4
7
CA3130
+7.5V
0.01µF
-DC
OUTPUT
5µF
+
-
100
kΩ
1N914
0.01µF
-7.5V
2kΩ
10kΩ
+
-
6V
P-P
INPUT;
BW (-3dB) = 360kHz
0.3V
P-P
INPUT;
BW (-3dB) = 320kHz
6
3
2
1
8
7
4
CA3086
CURRENT
LIMIT
ADJ
3Ω
R
2
1kΩ
Q
5
13
14
12
Q
1
Q
2
Q
3
Q
4
10 7 3
4269
11815
390Ω
1kΩ
20kΩ
+
-
5µF
25V
56pF
ERROR
AMPLIFIER
CA3130
30kΩ
100kΩ
IC1
0.01
VOLTAGE
ADJUST
50kΩ
R
1
14
13
Q
5
12
62kΩ
IC
3
OUTPUT
0 TO 13V
AT
40mA
+
-
0.01µF
+20V
INPUT
2.2kΩ
+
-
25µF
IC
2
CA3086
10
11
1, 2
Q
4
Q
1
8, 7
5
Q
3
Q
2
6
4
REGULATION (NO LOAD TO FULL LOAD): <0.01%
INPUT REGULATION: 0.02%/V
HUM AND NOISE OUTPUT: <25µV UP TO 100kHz
+
-
+
-
1kΩ
9
µF
3
CA3130, CA3130A