Datasheet

3-73
FIGURE 10. 9-BIT DAC USING CMOS DIGITAL SWITCHES AND CA3130
FIGURE 11. SINGLE SUPPLY, ABSOLUTE VALUE, IDEAL FULL-WAVE RECTIFIER WITH ASSOCIATED WAVEFORMS
6 3 101036
4
8
36
7
9
4
10
2
3
13
8
12 12
1
58
1313 1 12
8 5
14
11
2
6
5
1
7
7
1
6
8
4
3
2
10V LOGIC INPUTS
+10.010V
LSB
987 654 321
MSB
806K
1%
PARALLELED
RESISTORS
+15V
VOLTAGE
FOLLOWER
CA3130
OUTPUT
LOAD
100K
OFFSET
NULL
56pF
2K
0.1µF
REGULATED
VOLTAGE
ADJ
22.1k
1%
1K
3.83k
1%
0.001µF
CA3085
VOLTAGE
REGULATOR
+15V
2µF
25V
+
-
+10.010V
CD4007A
“SWITCHES”
CD4007A
“SWITCHES”
402K
1%
200K
1%
100K
1%
806K
1%
806K
1%
806K
1%
750K
1%
806K
1%
806K
1%
806K
1%
806K
1%
(2)
(4)
(8)
806K
1%
+
-
62
BIT
1
2
3
4
5
6 - 9
REQUIRED
RATIO-MATCH
STANDARD
±0.1%
±0.2%
±0.4%
±0.8%
±1% ABS
NOTE: All resistances are in ohms.
CD4007A
“SWITCHES”
1
5
10K
2
3
4
6
8
1
5
7
R
2
2k
+15V
0.01
µF
1N914
R
3
5.1k
PEAK
ADJUST
2k
100k
OFFSET
ADJUST
20pF
CA3130
R
1
4k
+
-
20V
P-P
Input: BW(-3dB) = 230kHz, DC Output (Avg) = 3.2V
1V
P-P
Input: BW(-3dB) = 130kHz, DC Output (Avg) = 160mV
Gain =
R
2
R
1
-------
= X =
R
3
R
1
+R
2
+R
3
--------------------------------------
R
3
=R
1
X+X
2
1 - X
------------------


For X = 0.5:
2K
4k
------------
=
R
2
R
1
-------
R
3
= 4k
0.75
0.5
-----------


= 6k
Top Trace: Output Signal; 2V/Div.
Bottom Trace: Input Signal; 10V/Div.
Time base on both traces: 0.2ms/Div.
0V
0V
CA3130, CA3130A