Datasheet

Chapter 2 — Theory of Operation
12 PB42 Portable Receipt Printer Service Manual
Programming MPTPR, MAMR, BR1, and OR1 is done by simply writing
the proper values to the registers.
To initialize the SDRAM and write to its mode registers do the following:
1 Run initialization step #1 from the UPM RAM array by writing
0x8080212C to MCR.
2 Load MAR with 0x00000046 (SDRAM mode register contents)
3 Run initialization step #2 from the UPM RAM array by writing
0x8080212E to MCR.
4 Load MAR with 0x00800000 (SDRAM mode register contents)
5 Run initialization step #3 from the UPM RAM array by writing
0x8080212E to MCR.
6 Run initialization step #4 from the UPM RAM array by writing
0x80802230 to MCR.
Once this is done, the memory controller will automatically take care of
memory refreshing as well as properly read and write data to the SDRAM.
Self Refresh Mode
Before the processor enters into any power saving modes or slower clock
speeds it must run from the flash memory space and put the SDRAM into
self refresh mode. In self refresh mode, the memory is in its lowest power
state while still preserving its contents. Note that this feature is not
supported in the R1 board due to a missed connection to the CKE pin. For
R1, PE29 must always be output high.
To place the memory into this mode, do the following:
1 Run from flash (CS0).
2 Clear MAMR[PTAE].
3 Run the self refresh sequence from the UPM RAM array by writing
0x80802129 to MCR.
4 Clear BR1[V].
Once this is done, attempts to access the SDRAM will generate an error.
To enable the SDRAM, do the following:
1 Set BR1[V].
2 Run the self refresh exit sequence step #1 from the UPM RAM array by
writing 0x80802110 to MCR.
3 Run step #2 by writing 0x80802130 to MCR.
4 Set MAMR[PTAE].