Service Manual PB42 Portable Receipt Printer
Service Manual PB42 Portable Receipt Printer
Intermec Technologies Corporation Worldwide Headquarters 6001 36th Ave.W. Everett, WA 98203 U.S.A. www.intermec.com The information contained herein is provided solely for the purpose of allowing customers to operate and service Intermec-manufactured equipment and is not to be released, reproduced, or used for any other purpose without written permission of Intermec Technologies Corporation.
Contents Contents Before You Begin . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v Safety Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v Sicherheitsübersicht . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . v Nicht alleine Reparaturen oder Einstellungen durchführen . . . . . . . . . . . . v Erste Hilfe . . . . . . . . . . . . . .
Contents iv Communication Interfaces. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . USB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Low Speed Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Full Speed Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Cable Detection . . . . . . . . . . . . . . . . . . . . . . .
Before You Begin Before You Begin This section provides you with safety information, technical support information, and sources for additional product information. Safety Summary Your safety is extremely important. Read and follow all warnings and cautions in this document before handling and operating Intermec equipment. You can be seriously injured, and equipment and data can be damaged if you do not follow the safety warnings and cautions.
Before You Begin Erste Hilfe Nach einer Verletzung unverzüglich erste Hilfe oder medizinische Betreuung aufsuchen. Verletzungen dürfen nicht vernachlässigt werden, auch wenn sie noch so unbedeutend erscheinen. Wiederbelebung Wiederbelebungsversuche müssen unverzüglich eingeleitet werden, falls jemand verletzt wird und die Atmung aussetzt. Verzögerungen können zum Tod führen. Bei Arbeiten an oder in der Nähe von Hochspannung müssen Ihnen die zugelassenen Erste-Hilfe-Methoden vertraut sein.
Before You Begin Telephone Support These services are available from Intermec. In the USA and Canada call 1-800-755-5505 and choose this option Services Description Order Intermec products • Place an order. • Ask about an existing order. 1 and then choose 2 Order Intermec media Order printer labels and ribbons. 1 and then choose 1 Order spare parts Order spare parts. 1 or 2 and then choose 4 Technical Support Talk to technical support about your Intermec product.
Before You Begin viii PB42 Portable Receipt Printer Service Manual
1 Spare Parts List and Exploded Views This chapter provides the exploded views and spare parts list for the PB42 Portable Receipt Printer.
Chapter 1 — Spare Parts List and Exploded Views PB42 Exploded Views and Parts Lists This chapter contains an exploded view and a spare parts list for the PB42. Locate the part you need to replace in the exploded view and then find the corresponding part number in the spare parts list.
Chapter 1 — Spare Parts List and Exploded Views 3 Screw (2 places) 2 1 6 4 5 Screw Screw (2 places) 7 9 Screw (6 places) 8 Screw (2 places) 10 11 Screw (3 places) Screw (6 places) 8 12 Screw (2 places) 11 Screw (2 places) 13 18 17 16 14 19 15 PB42 Portable Receipt Printer Service Manual 3
Chapter 1 — Spare Parts List and Exploded Views To identify a part, find the callout in this list and locate the part in the exploded view.
2 Theory of Operation This chapter provides a detailed electrical design of the PB42 printer. It is intended to help software engineering to know how to control the hardware.
Chapter 2 — Theory of Operation Microprocessor The microprocessor (U1) for the PB42 is the Freescale MPC875. The following sections describe circuitry connected directly to the microprocessor. Power Supply Sequencing and Bypass Capacitors Power Sequencing and Bypass Capacitors for U1 D101 helps keep VDD (1.8 V) from ever rising faster than the +3.3 V supply (VCC). D102 is a 1.8 V zener. It keeps VCC and VDD from being too far from each other. There are five 0.
Chapter 2 — Theory of Operation MODCK [1:2] (not shown) are set to 00 on reset. The filter on VDDSYN provides a clean supply to the internal PLL. CLKOUT is connected to the SDRAM. EXTCLK is not used. R103 is not placed. To set the frequency of the system clock to 66 MHz make the following settings to PLPRCR: PDF = 0, MFI = 13, MFN = 2, MFD = 9, S = 1, DBRMO = 0.
Chapter 2 — Theory of Operation Flash Interface Flash Memory Connections CS0 is the chip select line for the flash. The flash is accessed through one of the general-purpose chip-select machines (GPCM) of U1. BR0 and OR0 configure the GPCM control of the flash. Below are the required settings for those two registers. All other settings can be selected at the firmware designer’s discretion.
Chapter 2 — Theory of Operation • 0011 for 48.78 MHz < system clock < 60.98 MHz • SETA = 0 (Internal or external transfer acknowledge) • TRLX = 0 (Timing not relaxed) • EHTR = 0 (No extended hold time on read) SDRAM Interface The SDRAM Interface CS_RAM* is connected to CS1*. The hardware has been designed to allow the SDRAM to be connected to either UPMA or UPMB depending on the placement of RP117 or RP118. By default, RP117 is placed, connecting the SDRAM to UPMB.
Chapter 2 — Theory of Operation • WP = 0 (Read and write allowed) • MS = 11 (UPMB selected) • V = 1 (Valid bank) OR1 = 0xFF000A00: • AM = 0xFF00 (Corresponds to 16MBytes) • ATM = 000 (No address type mask) • SAM = 1 (Address multiplexing enabled) • G5LA = 0 (Output GPL5* on GPL_B5*) • G5LS = 1 (GPL5* high on memory accesses.) • BIH = 0 (Bursting is supported) MAMR = 0x20904331: • PTA = 32 (Periodic timer period = 15.625us.
Chapter 2 — Theory of Operation 0x0FFFFC34, 0x0FFFFC34, 0x0FFFFC34, 0x0FFFFC34, 0x0FFFFC34, 0x1FFFFC35 • Exception: Addresses 0x3C – 0x3D = 0x0FF77C04, 0x1FFFFC05 • Initialization step #1: Addresses 0x2C – 0x2D = 0x0FF77C34, 0x0FFFFC35 • Initialization step #2 and 3: Addresses 0x2E – 0x2F = 0x00F03C34, 0x0FFFFC35 • Enter self refresh mode: Addresses 0x29 – 0x2B = 0x0FF77C34, 0x0FFFFC34, 0x1FF5F035 • Exit self refresh mode: Addresses 0x10 – 0x15 = 0x0FFFFC34, 0x0FFFFC34, 0x0FFFFC34, 0x0FFFFC34, 0x0FFFFC34,
Chapter 2 — Theory of Operation Programming MPTPR, MAMR, BR1, and OR1 is done by simply writing the proper values to the registers. To initialize the SDRAM and write to its mode registers do the following: 1 Run initialization step #1 from the UPM RAM array by writing 0x8080212C to MCR. 2 Load MAR with 0x00000046 (SDRAM mode register contents) 3 Run initialization step #2 from the UPM RAM array by writing 0x8080212E to MCR.
Chapter 2 — Theory of Operation Serial Peripheral Interface (SPI) The Serial Peripheral Interface (SPI) is used to communicate with five external chips: the FRAM, input shift register, output shift register, DAC, and ADC. The following sections describe the SPI settings and data format for each of these slave devices. For more specific information on operation of the MPC875 or any of the other SPI devices, see their respective specifications.
Chapter 2 — Theory of Operation Memory reads and writes have the following format: Read/write op-code, lower 8 bits of address, data. For multiple byte transfers, the address is automatically incremented. If the address reaches 0x1FF, the next address is 0x000. Memory Write Memory Read Input/Output Shift Registers Due to a shortage of GPIO pins on U1, input and output shift registers are connected to the SPI.
Chapter 2 — Theory of Operation Schematic for the Input/Output Shift Register Both shift registers reside on the same chip select (PA7). So, for every data transfer, data is both sent and received simultaneously. The SPI software must be sure to have valid data in the transmit buffer for every shift register transfer. Maximum SPI clock frequency is 5 MHz. Data length is 8 bits (SPMODE[LEN] = 7). SPMODE[CI] = 1 and SPMODE[CP] = 1. If SPMODE[REV] = 1, the MSB is sent and received first.
Chapter 2 — Theory of Operation Digital to Analog Converter Signals Maximum SPI clock frequency is 20 MHz. SPMODE[CI] = 1, SPMODE[CP] = 0, SPMODE[REV] = 1, and SPMODE[LEN] = 0xf (16 bit transfers). The data format is given below: D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 X SPD PWR X X: Do not care SPD: Speed control bit. PWR: Power control bit. New DAC value (8 bits) 1 -> fast mode 1 -> power down 0 0 0 0 0 -> slow mode 0 -> normal operation The SPD bit should always be set.
Chapter 2 — Theory of Operation Selected Channel Bit 3 Bit 4 Bit 5 0 0 0 0 1 1 0 0 2 0 0 1 3 1 0 1 4 0 1 0 5 1 1 0 6 0 1 1 7 1 1 1 All data after bit 5 is “don’t care.” Conversion data is received starting from bit 7. (MSB first) Data received before this is “don’t care.” For R1, the ADC (U16) should only be used when U32 is enabled. Compact Flash Interface The 802.11 module has not yet been selected.
Chapter 2 — Theory of Operation To prevent forward biasing of the print controller chips’ protection diodes be sure to set the following GPIO lines to output low when U32 is disabled: • PCSTB* - PE30 • PCRESET* - PE28 • PCDATA[1:8] – PE21 – PE14 Reset After U32 has been enabled (set PC_PWR_EN high) for at least 2μs, PCRESET* must be de-asserted. PCSTB* should also be de-asserted (output high).
Chapter 2 — Theory of Operation Timing Diagram for the Parallel Interface Serial Interface Even though the print controller receives data via the parallel interface, it still sends error codes and response codes back via the serial interface. The SMC receive line of the processor (PB24) is used to receive that data. There is no flow control or handshaking.
Chapter 2 — Theory of Operation Error Detection When the print controller encounters an error condition it asserts the ERROR* interrupt (IRQ7). The error type is encoded on three signals: ERR0, ERR1, and ERR2. These are connected, respectively, to bits 2, 1, and 0 of the input shift register.
Chapter 2 — Theory of Operation The printhead temperature sensor, SHTH, is not available by default. U40 must be installed to enable the ADC to read this voltage. Paper Feed and Backfeed Asserting the FEED* and BFEED* signals (PE26 and PE27) causes the print controller to feed the paper, respectively, forward and backward. Printhead Resistance Test Every time the print controller starts up, it conducts a printhead resistance test to verify that each dot is within tolerance for its resistance.
Chapter 2 — Theory of Operation Voltage Levels of an Individual Dot of the Printhead Test Communication Interfaces USB U1 has USB host and function capability, but only the function capability will be used. (USMOD[HOST] = 0) The hardware can be configured as either a low speed or a full speed device. Full speed is default. The USB transceiver (U14) is connected to the MPC875 USB interface pins. In addition to those pins, the transceiver also has a SUSPND pin. This is connected to PB23.
Chapter 2 — Theory of Operation Low Speed Configuration To configure the USB controller as low speed, USMOD[LSS] = 1. To configure the hardware to low speed, place R1404 and R1401, and remove R1403 and R1402. The low speed configuration is the default hardware configuration. To be “seen” by the host when connected, a 1.5 Ω resistor must be connected between D- and +3.3 V. This resistor, R1401, is enabled by setting PE31 to output low. To appear disconnected from the host, set PE31 to output high.
Chapter 2 — Theory of Operation The SCC UART is shared with the Bluetooth module. Selection between RS-232 and Bluetooth is accomplished with the SERIAL/BT* output. (PE22) To enable the RS-232 transceiver and disconnect the Bluetooth module set SERIAL/BT* to output high. Cable Detection When an active (powered) cable is inserted into or removed from the serial jack, an interrupt on PC15 occurs. Interrupts on PC15 are handled by the CPM interrupt controller (CPIC). A cable is inserted when PC15 is high.
Chapter 2 — Theory of Operation y Secondary Serial Test Port Communication Lines The SMC UART has no flow control. So, it has only RX and TX. The SMC TX signal is connected directly to the test port. For the SMC RX signal, a 2:1 mux (U15) is used to switch between the PCTXD and the test port TX signal. To operate properly, the DETECT pin (pin 4) of the test cable must be grounded. When DETECT is grounded, the mux selects the test port. When DETECT is left floating, the mux selects PCTXD.
Chapter 2 — Theory of Operation The speaker driver accepts data that is 8-bit PCM encoded audio samples. Samples must be sent to the DAC at the same frequency that they were encoded. A sample rate of 8 kHz is common and should produce adequate sound quality without consuming large amounts of memory. If the audio samples are too large, they can be stored in compressed format in flash, uncompressed during initialization, and stored in RAM, which is plentiful (16 MB of RAM vs. 4 MB of flash).
Chapter 2 — Theory of Operation A switching regulator converts the input voltage to 9.0 VDC. If the input voltage drops below (about) 9.5 V the converter is not able to maintain a 9.0 V output, and will turn off. When this happens, EXT_PWR (IRQ1) will be pulled down. When external power is within its acceptable voltage range, EXT_PWR will be high. Charging Circuits The Battery Charging Circuits and Battery Connector Pinout There are two charging integrated circuits (ICs), one for each battery.
Chapter 2 — Theory of Operation Charging initiation is automatic. When the print controller is disabled and external power is applied, either from the DC jack or the external charging contacts, the charging circuit is activated. Each charging IC has two charging status outputs: CHARGING_[A,B]* and CHG_DONE_[A,B]*. These outputs behave according to the following table.
Chapter 2 — Theory of Operation Battery EEPROM Each battery pack contains a 1-wire ID, 256 bit, EEPROM from Dallas Semiconductor (Maxim), DS2430A. The 1-wire interfaces for battery A and B (ID-A and ID-B) are connected to PE23 and PE25, respectively. These pins are configured as open drain outputs. (PEODR[OD23,OD25] = 1) Sleep Mode Sleep mode is necessary to provide adequate battery life. When not printing, the printer should be in sleep mode.
Chapter 2 — Theory of Operation The processor defaults to normal high mode. In this mode, the main system clock runs at full speed (66 MHz). In normal low mode the clock is divided down by a division factor set by SCCR[DFNL]. This field should be set to “Divide by 256” (111). Running the processor at this lower speed (about 258 kHz) will conserve power. To enter normal low mode set PLPRCR[CSRC] to 1. Clearing the bit will return the processor to normal high mode.
Chapter 2 — Theory of Operation Printhead Power Switch Control Logic Watchdog Timer The PowerPC microprocessor has a watchdog timer function. The watchdog timer automatically resets the processor after a pre-determined time period if a specific set of instructions are not executed. In case there is a software lock-up condition caused by some unforeseen event (such as ESD) this function should be enabled. Section 10.7 of the MPC885 Reference Manual describes the watchdog timer in detail.
Chapter 2 — Theory of Operation Immunity and Emissions The PB42 circuitry is protected from externally conducted or radiated noise, power surges, and electrostatic discharge (ESD). The following sections describe the protection circuitry from these different types of sources. ESD All externally accessible connectors must be protected from ESD at 15kV air discharge and 8kV contact discharge. Those connectors are P6, J7, P7, J3, and J2. P6 and J7 are protected by bidirectional, TVS diodes.
Chapter 2 — Theory of Operation The DC-DC converter circuitry is protected by Q2701 and Q2702. The comparators of U27 turn on Q2701 and Q2702 when the input voltage is between 8V and 18V. If a voltage spike occurs on the DC input, the comparator will immediately turn off the transistors until the voltage returns to an acceptable level. If the printer does not have batteries installed, power to the printer will momentarily be interrupted. L1 suppresses high frequency noise.
Chapter 2 — Theory of Operation Switching Power Supplies For the sake of power efficiency, switching DC-DC converters are used for the 9 V, 3.3 V and 1.8 V supplies. To minimize emissions, magnetically shielded inductors were used for all three. The 9 V switcher operates at 300 KHz, the other two operate at 850 KHz. Abundant input and output capacitors were used to filter switching noise. The ceramic filter caps were placed as close to the chips as possible.
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