Datasheet

nugget Theory of Operation

4-5

Memory Map

Up to 1MB of directly addressable memory space is supported by the V30HL. The

VG-230 provides access to additional memory space through 26 mapping registers.

Each memory mapping register controls a 16K block of memory. The bottom 512K of

the RAM array are always mapped to the base 512K of the 1MB memory space of the

V30HL. The top 32K of the RAM array are alwaysmappedtotheCGABUFFERarea

of the 1MB memory space of the V30HL. Finally, the bottom 64K of the heavy access

ROM array are always mapped to the top 64K of the 1MB memory space of the V30HL

or ROM BIOS.

Oscillators

The Vadem VG-230 requires two crystal oscillators. The primary crystal frequency for

the CPU oscillates at 32.215905 MHz and uses a third overtone configuration. The

second crystal oscillates at 32.768 KHz and provides the real time clock frequency. The

32.768 KHz uses a fundamental design with a variable capacitor to achieve the accuracy

setting required.

Flash Memory

The main PCB was designed to support 2MB or 4MB of flash memory. These memory

configurations are supported on the main PCB:

• 2MB—one 16Mbit flash (28F016SA)

• 4MB—two 16Mbit flash (28F016SA)

• 4MB—one 32Mbit flash (DD28F032SA)

The flash memory selected for the main PCB provides very high read/write

performance. The flash memory also features advanced write state machines.

The main PCB supports these additional features:

• ASIC controlled boot address (BOOT-ADDR) signal for boot block swapping,

allowing the boot block to be reprogrammed and the check sum validated before

the new boot block is used.

• ASIC controlled write protect (WP*) signal for controlling unwanted writes to the

flash memory.

• +12V programming voltage flash devices. However, with an alternate stuffing of

components, +5V programming voltage flash devices can be supported.

Static RAM

Two 512K Static RAM (SRAM) devices are used in the main PCB to provide 1MB of

RAM. The SRAM is powered by VCC230A.

241X terminals that were manufactured earlier used pseudo-static RAM in place of

SRAM. With these terminals, when the main PCB is in Suspend mode, the ASIC

generates self-refresh (SELF-REF*) to maintain memory.