Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

+V3_3
+V3_3
+V3_3
+V3_3
+V3_3
+V5_0
+V5_0
+
R
D
C
B
B
D
C
1
12345678
2345678
A
A
LAST REVISED:
DRAWN BY:
1900 Prairie City Road
Folsom, California 095630 OF
TITLE:
PROJECT:
Rev:
KC533
Intel Corporation
SNS_ADJ
OUT
GND
SHDN_N
IN
OSC_80MHZ
VCC
VEE
OUT+
OUT-
A2920OSC
EN
IN0
IN1
OUT
FB
NC
GND1
GND0
CAD NOTE:
Use flood or fat trace
for SCSI_AGND
Isolate Digital and Analog Ground
AIC-7902 SCSI Decoupling
SCSI Voltage Regulators and SCSI Clock
56 85
3
7
5
6
4
2
8
1
U101
LT1118CS8
4
2
3
1
U76
5
4
3
1
2
U100
LT1764ET
INTEL (R) E7501 CHIPSET CUSTOMER REFERENCE BOARD
1.0
11/18/02
70OHMS
FB31
1 2
C1433
10UF
51
R1013
51
R1012
C1374
0.01UF
1UF C1377
C1376
0.01UF
C1378
0.1UF
C903
10UF
1K
R694
1%
487
R695
1%
0.01UF
C1375 10UF
C902
R693
1K
1%
R692
1.05K
1%
C1379
0.01UF
C1368
0.01UF 0.01UF
C1367 C1366
0.01UF 0.01UF
C1365 C1364
0.01UF 0.01UF
C1363 C1362
0.01UF
0.047UF
C1373 C1372
0.047UF
0.01UF
C1371 C1370
0.01UF
0.01UF
C1369
10UF
C901 C900
10UF 10UF
C899
0.01UF
C1361 C1360
0.01UF 0.01UF
C1359 C1358
0.01UF
0.01UF
C1357 C1356
0.01UF
0.01UF
C1355
C1354
0.01UF
0.01UF
C1353 C1352
0.01UF 0.01UF
C1351 C1350
0.01UF
0.01UF
C1349 C1348
0.01UF
0.01UF
C1347 C1346
0.01UF
0.01UF
C1345 C1344
0.01UF 0.01UF
C1343 C1342
0.01UF
AIC_CLKNP
53
55
SCSI_AGND
SCSI_CORE_VCC 54,55
SCSI_VCC
54
AIC_CLKNM
53