Intel Xeon Processor Multiprocessor Platform Design Guide

7
8-16 Filter Specifications .............................................................................................87
8-17 Implementation 1 Using Discrete R.....................................................................88
8-18 Implementation 2 No Discrete R .........................................................................89
8-19 Example of Decoupling for a Microstrip Baseboard Design ................................89
9-1 Simulation Methodology Flowchart .....................................................................91
9-2 Source Synchronous Timing Diagram for Setup Time ........................................94
9-3 Source Synchronous Timing Diagram for Hold Time .......................................... 95
9-4 Circuit Used to Develop the Common Clock Timing Equations ..........................96
9-5 Timing Diagram Used to Determine the Common Clock Setup Timing
Equations ............................................................................................................97
9-6 Timing Diagram Used to Determine the Common Clock Hold Timing
Equations ............................................................................................................98
9-7 Traditional Method of Calculating Rising Edge to Rising Edge Flight Time,
Assuming a Linear Edge from V
IL
Through V
IH
at the Receiver .......................102
9-8 Method of Calculating Setup Flight Time When the Edge Rate Seen at the
Receiver is Slower than the Minimum Edge Rate ............................................. 102
9-9 Traditional Method of Calculating Flight Time Assuming a Nonlinear Edge
from V
IL
Through V
IH
at the Receiver ...............................................................103
9-10 Traditional Method of Calculating Flight Time Assuming a Ringback
Violation from V
IL
Through V
IH
at the Receiver.................................................103
9-11 Example of Sweeps Used to Evaluate the Length Limits of Trace L2
and L3 ...............................................................................................................105
9-12 Monte Carlo Analysis Should Be Performed on These Areas of the
Phase 1 Solution Space ....................................................................................105
9-13 Results of Targeted Monte Carlo (TMC) Analysis and the Resultant
Phase 2 Solution Space for Variables L2 and L3..............................................106
10-1 Example of ISI Impact on Timing and Signal Integrity.......................................108
10-2 Propagation on Aggressor Network ..................................................................109
10-3 Aggressor and Victim Networks ........................................................................109
10-4 Transmission Line Geometry of Microstrip and Stripline...................................110
10-5 Cross-Section of a 3-Conductor System Used to Create a SLEM Model .........113