Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

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+
R
D
C
B
B
D
C
1
12345678
2345678
A
A
LAST REVISED:
DRAWN BY:
1900 Prairie City Road
Folsom, California 095630 OF
TITLE:
PROJECT:
Rev:
KC533
Intel Corporation
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DS2119M
-R1
-R2
-R3
-R4
-R5
-R6
-R7
-R8
+R1
+R2
+R3
+R4
+R5
+R6
+R7
+R8
+R9
DIFF_CAP
HSGND2
HSGND1
GND
D_SNS
VREF
M_S
ISO
-R9
TPWR1
TPWR0
DS2119M
-R1
-R2
-R3
-R4
-R5
-R6
-R7
-R8
+R1
+R2
+R3
+R4
+R5
+R6
+R7
+R8
+R9
DIFF_CAP
HSGND2
HSGND1
GND
D_SNS
VREF
M_S
ISO
-R9
TPWR1
TPWR0
DS2119M
-R1
-R2
-R3
-R4
-R5
-R6
-R7
-R8
+R1
+R2
+R3
+R4
+R5
+R6
+R7
+R8
+R9
DIFF_CAP
HSGND2
HSGND1
GND
D_SNS
VREF
M_S
ISO
-R9
TPWR1
TPWR0
20MIL
Use 40 mil trace
20MIL
20MIL
20 MIL trace
20 MIL trace
20 MIL trace
LVD/SE Termination for SCSI Channel A
58 85
3
5
8
10
12
19
21
24
2
4
7
9
11
18
20
23
25
17
22
6
14
16
1
15
13
26
28
27
U95
3
5
8
10
12
19
21
24
2
4
7
9
11
18
20
23
25
17
22
6
14
16
1
15
13
26
28
27
U94
3
5
8
10
12
19
21
24
2
4
7
9
11
18
20
23
25
17
22
6
14
16
1
15
13
26
28
27
U93
LVTRMPWR_A55,57
0.1UF C1383
C1382 0.1UF
21
4.7UF
C1435
0.1UF
C1381
21
4.7UF
C1437
INTEL (R) E7501 CHIPSET CUSTOMER REFERENCE BOARD 1.0
11/18/02
R697
4.7K
1 2
C1436
4.7UF
R700
1K
C1384
0.1UF
R702
20K
0.1UF
C1668
21
10UF
C1434
CHA_TERMEN53
DIFFSENSEA_R53,57
LVSCDAM13 53,57
LVSCDAPHM 53,57
LVSCDAM1 53,57
LVSCDAM14 53,57
LVSCDAM10 53,57
LVMSGAP53,57
LVCDAP53,57
LVIOAP53,57
LVSCDAP953,57
LVSCDAP1153,57
LVSCDAP1053,57
LVSCDAP853,57
LVREQAP53,57
LVSELAP53,57
LVMSGAM 53,57
LVCDAM 53,57
LVIOAM 53,57
LVSCDAM9 53,57
LVSCDAM11 53,57
LVSCDAM8 53,57
LVREQAM 53,57
LVSELAM 53,57
LVSCDAP453,57
LVSCDAP653,57
LVSCDAPLP53,57
LVACKAP53,57
LVRSTAP53,57
LVBSYAP53,57
LVATNAP53,57
LVSCDAP753,57
LVSCDAP553,57
LVSCDAP1253,57
LVSCDAP1453,57
LVSCDAPHP53,57
LVSCDAP153,57
LVSCDAP353,57
LVSCDAP253,57
LVSCDAP053,57
LVSCDAP1553,57
LVSCDAP1353,57
LVSCDAM4 53,57
LVSCDAM6 53,57
LVSCDAPLM 53,57
LVACKAM 53,57
LVRSTAM 53,57
LVBSYAM 53,57
LVATNAM 53,57
LVSCDAM7 53,57
LVSCDAM5 53,57
LVSCDAM12 53,57
LVSCDAM3 53,57
LVSCDAM2 53,57
LVSCDAM0 53,57
LVSCDAM15 53,57