Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

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Intel

Xeon™ Processor and Intel

E7500/E7501 Chipset Compatible Platform Design Guide 2

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Intel may make changes to specifications and product descriptions at any time, without notice.

Designers must not rely on the absence or characteristics of any features or instructions marked “reserved” or “undefined.” Intel reserves these for

future definition and shall have no responsibility whatsoever for conflicts or incompatibilities arising from future changes to them.

The Intel

E7500 and Intel

E7501

chipsets and processors in the Intel

Xeon™ processor family may contain design defects or errors known as

errata which may cause the product to deviate from published specifications. Current characterized errata are available on request.

Contact your local Intel sales office or your distributor to obtain the latest specifications and before placing your product order.

C is a two-wire communications bus/protocol developed by Philips. SMBus is a subset of the I

C bus/protocol and was developed by Intel.

Implementations of the I

C bus/protocol may require licenses from various entities, including Philips Electronics N.V. and North American Philips

Corporation.

Alert on LAN and Alert on LAN2 are a result of the Intel-IBM Advanced Manageability Alliance and a trademark of IBM

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