Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

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Introduction

20 Intel

Xeon™ Processor and Intel

E7500/E7501 Chipset Compatible Platform Design Guide

1.2 Reference Documentation

Table 1-1. Reference Documents (Sheet 1 of 2)

Document Document Number/Source

603-Pin Socket Design Guidelines

http://developer.intel.com/design/

Xeon/guides/249672.htm

ITP700 Debug Port Design Guide

http://developer.intel.com/design/

Xeon/guides/

Intel

Xeon™ Processor with 512-KB L2 Cache Signal Integrity

Models

http://developer.intel.com/design/

Xeon/devtools

Intel

82801CA I/O Controller Hub 3 (ICH3-S) Datasheet

http://developer.intel.com/design/

chipsets/e7500/datashts/290733.htm

Intel

82870P2 PCI/PCI-X 64-bit Hub 2 (P64H2) Thermal Design

Guide

http://developer.intel.com/design/

chipsets/e7500/guides/252175.htm

Intel

E7500/E7501/E7505 Chipset Thermal Design Guide

http://developer.intel.com/design/

chipsets/e7500/guides/298647

Intel

82870P2 PCI/PCI-X 64-bit Hub 2 (P64H2) Datasheet

http://developer.intel.com/design/

chipsets/e7500/datashts/290732.htm

Intel

E7500 Chipset: Intel

E7500 Chipset Memory Controller Hub

(MCH) Datasheet

http://developer.intel.com/design/

chipsets/e7500/datashts/290730.htm

PCI Bus Power Management Interface Specification, Revision 1.1

http://www.pcisig.com/specifications/

pci_bus_power_management_

interface

PCI Hot-Plug Specification, Revision 1.1

http://www.pcisig.com/specifications/

pci_hot_plug

PCI Local Bus Specification, Revision 2.2

http://www.pcisig.com/specifications/

conventional_pci

PCI-PCI Bridge Architecture Specification, Revision 1.1

http://www.pcisig.com/specifications/

pci_to_pci_bridge_architecture

PCI Standard Hot-Plug Controller and Subsystem Specification,

Revision 1.0

http://www.pcisig.com/specifications/

pci_hot_plug

PCI-X Specification, Revision 1.0a

http://www.pcisig.com/specifications/

pci_x

System Management Bus Specification (SMBus), Revision 1.1 http://www.smbus.org/specs/

Universal Serial Bus Specification, Revision 1.1

http://www.usb.org/developers/

docs.html

VRM 9.1 DC-DC Converter Design Guidelines

http://developer.intel.com/design/

Xeon/guides/

Intel

Xeon™ Processor with 512-KB L2 Cache at 1.80 GHz to

2.80 GHz Datasheet

http://developer.intel.com/design/

xeon/datashts/298642.htm

Intel

Xeon™ Processor Voltage Regulator Down (VRD) Design

Guidelines

http://developer.intel.com/design/

Xeon/guides/

Intel

Xeon™ Processor with 512-KB L2 Cache System Compatibility

Guidelines

http://developer.intel.com/design/

Xeon/guides/

Intel

Xeon™ Processor Thermal Design Guidelines

http://developer.intel.com/design/

Xeon/guides/298348.htm

Intel

Xeon™ Processor Thermal Solution Functional Specifications

http://developer.intel.com/design/

Xeon/applnots/249673.htm