64-bit Intel Xeon Processor with 800 MHz System Bus (1MB and 2MB L2 Cache Versions) Specification Update

Intel
®
Xeon™ Processor with 800 MHz System Bus—
64-bit Intel
®
Xeon
®
Processor with 800 MHz System Bus (1 MB and 2 MB L2 Cache Versions)
Specification Update August 2009
36 Order Number: 302402-024
Implication: Operating systems or drivers that reference a selector in non-canonical space
may experience an unexpected #GP fault. Intel has not observed this erratum
with any commercially available software.
Workaround:None at this time.
Status: For the steppings affected, see the Summary Table of Changes.
S46 INS or REP INS flows save an incorrect memory address for
SMI on processors supporting Intel
®
Extended Memory 64
Technology (Intel
®
EM64T)
Problem: In IA-32e mode of the Intel EM64T processor, an INS or an REP INS
instruction, followed by an SMI, may save an incorrect memory address to the
System Management Mode (SMM) save state location.
Implication: Due to this erratum, the SMM macro-handler may use the incorrect memory
address while reproducing the I/O access of SMI.
Workaround:It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Table of Changes.
S47 FXSAVE instruction may result in incorrect data on processors
supporting Intel
®
Extended Memory 64 Technology
(Intel
®
EM64T)
Problem: In IA-32e mode of the Intel EM64T processor, the upper 32 bits of the FDP
value written out to memory by the FXSAVE instruction may be incorrect.
Implication: This erratum may cause incorrect data to be saved into the memory.
Workaround:It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Table of Changes.
S48 The base of a null segment may be non-zero on a processor
supporting Intel
®
Extended Memory 64 Technology (Intel
®
EM64T)
Problem: In IA-32e mode of the Intel EM64T processor, the base of a null segment may
be non-zero.
Implication: Due to this erratum, Intel EM64T enabled systems may encounter unexpected
behavior when accessing memory using the null selector.
Workaround:It is possible for the BIOS to contain a workaround for this erratum.
Status: For the steppings affected, see the Summary Table of Changes.
S49 Upper 32 bits of FS/GS with null base may not get cleared in
Virtual-8086 Mode on processors with Intel
®
Extended Memory
64 Technology (Intel
®
EM64T) Enabled
Problem: For processors with Intel EM64T enabled, the upper 32 bits of the FS and GS
data segment registers corresponding to a null base may not get cleared when
segments are loaded in Virtual-8086 mode.
Implication: This erratum may cause incorrect data to be loaded or stored to memory if
FS/GS is not initialized before use in 64-bit mode. Intel has not observed this
erratum with any commercially available software.
Workaround:None at this time.