ITP700 Debug Port Design Guide

ITP700 Debug Port Design Guide 65

8 Intel

Itanium

2 Processor

System Implementation

Guidelines

There are three classes of ITP debug tool connections to Intel

Itanium

2 processor platforms:

• ITP debug port for each processor node for register access and run-time control. A processor

node consists of at least one Itanium 2 processor and may contain other TAP devices.

• ITP debug port for each I/O domain for register access and event line monitoring. An I/O

domain consists of at least one Itanium 2 processor -based chipset component, no (0)

processors, and may contain other TAP devices.

• ITP debug ports for miscellaneous auxiliary scan chains for register access. A miscellaneous

debug port may contain TAP devices, but does not contain a processor and does not contain

an Itanium 2 processor-based chipset component.

The implementation and routing rules for the I/O domain debug port (class b, above) and the

miscellaneous debug port (class c, above) are a subset of the routing rules for processor node

debug port. This chapter describes the requirements for implementing a processor node debug port

(class a, above). Consult the appropriate chipset DPDG for clarification of requirements for the

other two other debug port classes.

8.1 ITP DC and AC Electrical Specifications for Intel

Itanium

2 Processor Systems

8.1.1 DC Electrical Specifications

The following specifications are for a standard debug port platform implementation using only

Itanium 2 processors (and optionally Itanium 2 chipset components). The following specifications

also require the debug port platform implementation is designed according to the guidelines found

in chapter 1 of this document. If the system design differs from either of these requirements, the

additional drive specifications listed in the Complete Electrical Specifications chapter of the

ITP700 Debug Port Design Guide must be used to interpolate appropriate design data for any non-

standard operating condition or electrical range.

An explanation of “DPA Type”: existing designs should conform to the ‘ITP700DPA’ DPA Type,

for new implementations, Intel recommends all designs conform to the ‘LVDPA’ DPA Type.