Voltage Regulator Module (VRM) 10.2L Design Guidelines

Voltage Regulator Module (VRM) Design Guidelines 7
1 Applications
1.1 Introduction and Terminology
This document defines DC-to-DC converters to meet the power requirements of computer systems
using 64-bit Intel
®
Xeon™ processor MP with up to 8MB L3 cache and 64-bit Intel
®
Xeon™
processor MP with 1MB L2 cache processor. Requirements will vary according to the needs of
different computer systems and processors that a specific voltage regulator is expected to support.
The intent of this document is to define electrical, thermal and mechanical specifications for
VRM 10.2L.
VRM – The voltage regulator module (VRM) designation in this document refers to a voltage
regulator that is plugged into a baseboard, where the baseboard is designed to support more than
one processor. VRM output requirements in this document are intended to match the needs of a set
of microprocessors.
‘1’ – In this document refers to a high voltage level (V
OH
and V
IH
).
‘0’ – In this document refers to a low voltage level (V
OL
and V
IL
)
‘#’ – Symbol after a signal name in this document refers to an active low signal, indicating that a
signal is in the asserted state when driven to a low level.
The specifications in the processor’s datasheet always take precedence over the data provided in
this document.
VRM 10.2L incorporates functional changes from prior EVRD and VRM guidelines:
• Continuous load core current (Icc
TDC
) (thermal design current) of 105 A (Section 2.1).
• A maximum core current (Icc
MAX
) of 120 A.
• Maximum current slew rate of 930 A/µs.
• Mechanical compliance to the VRM 10.2 design guideline.
§