ITP700 Debug Port Design Guide

R
98 ITP700 Debug Port Design Guide
* ADDITIONAL MODEL THAT MAY BE ADDED:
* qs3vh125 = QUALITY SEMICONDUCTOR* QUICKSWITCH
*
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.SUBCKT BPM5DR GNDREF M2
* Declare VCX (produced on DPI/DPA)
VINIT1 VCX GNDREF DC 1.65
*
* The following is a generalization of the qs3vh125.
* A true spice model of the quickswitch may be
* added between pins BPM5QS and GNDREF.
* Be sure to remove the following generalization
* if the true spice model is used.
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* BPM5QS path to GND through quickswitch
* QSOP Pin Model
X1 GNDREF INT1 GNDREF QSOP
* Quickswitch Internal Resistance
RQS INT1 INT2 4
* QSOP Pin Model
X2 BPM5QS INT2 GNDREF QSOP
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* Load elements
R17 BPM5QS VCX 249
L3 BPM5QS BPM5A 3.30E-7
R15 BPM5A M1 10
* Setup Minitek* connector nodes
* Minitek* pad capacitance