Intel Xeon Processor Multiprocessor Platform Design Guide

System Overview

System Overview 2

2.1 The Intel

Xeon™ Processor MP and the Intel

Xeon™ Processor MP with up to 2-MB L3 Cache on

the 0.13 Micron Process

The Intel Xeon processor MP is the next generation IA-32 microprocessor for servers. The

processor is based on Intel

NetBurst™ microarchitecture but maintains the tradition of complete

compatibility with IA-32 software. The Intel Xeon processor MP, like its P6 predecessors, support

Intel

MMX™ technology instructions for enhanced media and communication performance. In

addition, the processor also supports Streaming SIMD Extensions, introduced in the Intel

Pentium

III Xeon™ processor.

The Intel Xeon processor MP is intended for high performance server systems with up to four

processors on one bus. The processor is available for 1-4 way and greater than 4-way designs. Intel

Xeon processors MP employ a 256-KB L2 cache, and are available with 512-KB or 1-MB of L3

cache. The processor includes manageability features and new IA-32 instructions. Components of

the manageability features include an Scratch EEPROM and Processor Information ROM, which

are accessed through a SMBus, interface and contain information relevant to the particular

processor and system in which it is installed. In addition, enhancements have been made to the

Machine Check Architecture.

The Intel Xeon processor MP with up to 2-MB L3 cache is based on 0.13-micron process

technology, and is a follow-on to the Intel Xeon processor MP. The Intel Xeon processor MP with

up to 2-MB L3 cache on the 0.13 micron process processor, like the Intel Xeon processor MP,

maintains IA-32 software compatibility and is based on the Intel NetBurst microarchitecture. The

Intel Xeon processor MP with up to 2-MB L3 cache on the 0.13 micron process supports 1-4 way

and greater than 4-way designs. These processors are intended for high performance workstations

and server systems utilizing up to four processors on one bus. All of these larger L3 cache

processors employ a 512 KB L2 cache.The Intel Xeon processor MP with up to 2-MB L3 cache on

the 0.13 micron process processors will be available with either 1-MB or 2-MB integrated L3

cache. The processor will include the manageability features found on the Intel Xeon processor

such as the Scratch EEPROM and Processor Information ROM (PIROM).

For server applications, the Streaming SIMD Extensions improves TCP/IP and memory/cache

performance, benefits connected applications such as web hosting, security, and e-commerce, as

well as traditional server applications such as database, enterprise resource planning, and media

applications. Many popular operating systems, databases, and other applications are being tuned to

take advantage of these new Streaming SIMD Extensions to deliver significant performance gains.

Intel Xeon processors MP and Intel Xeon processors MP with up to 2-MB L3 cache on the 0.13

micron process include Streaming SIMD Extensions 2 instructions. For server applications, these

new instructions are expected to improve memory/cache performance, boost the number of

authenticated transactions in e-commerce environments, as well as the traditional server

applications like database, enterprise resource planning, and computer/telephony integration.

The Intel Xeon processor MP and Intel Xeon processor MP with up to 2-MB L3 cache on the 0.13

micron process use a new system bus protocol referred to as the “system bus” in this document.

This system bus utilizes a split-transaction, deferred reply protocol similar to that of the P6