Voltage Regulator Module (VRM) and Enterprise Voltage Regulator-Down (EVRD) 10.1 Design Guidelines

4 Voltage Regulator Module (VRM) and Enterprise Voltage
Regulator-Down (EVRD) 10.1 Design Guidelines
8.5 Altitude - PROPOSED....................................................................................................... 35
8.6 Electrostatic Discharge - PROPOSED.............................................................................. 36
8.7 Shock and Vibration - PROPOSED .................................................................................. 36
8.8 Electromagnetic Compatibility - PROPOSED ................................................................... 36
8.9 Reliability - PROPOSED ................................................................................................... 36
8.10 Safety - PROPOSED ........................................................................................................ 36
9 Manufacturing Considerations .........................................................................................37
9.1 Lead Free (Pb Free)..........................................................................................................37
Figures
2-1 VRM/EVRD 10.1 Load Current vs. Time............................................................................. 9
2-2 VRM/EVRD 10.1 Processor Die Load Line....................................................................... 10
2-3 Processor Vcc Overshoot Example Waveform ................................................................. 12
2-4 Power-On Sequence Block Diagram ................................................................................ 13
2-5 Power-On Sequence Timing Diagram .............................................................................. 13
2-6 Processor Transition States.............................................................................................. 14
2-7 Dynamic VID Transition States Illustration........................................................................ 15
2-8 Model of Processor Load .................................................................................................. 16
7-1 VRM 10.1 Module and Connector..................................................................................... 33
Tables
2-1 LL0, LL1 Codes................................................................................................................. 11
2-2 Recommended Decoupling and Other Specifications....................................................... 16
2-3 VRM 10.1 Decoupling Capacitor Recommendations........................................................ 17
3-1 OUTEN Specifications ...................................................................................................... 19
3-2 VID [5:0] Specifications.....................................................................................................19
3-3 Voltage Identification (VID) ............................................................................................... 20
3-4 LL0, LL1 Specifications..................................................................................................... 21
6-1 Vcc_PWRGD Specifications ............................................................................................. 27
6-2 VR_hot# Specifications..................................................................................................... 27
6-3 VRM_pres Specifications.................................................................................................. 28
7-1 VRM10.1 Connector Part Number and Vendor Name ...................................................... 29
7-2 VRM 10.1 Connector Pin Descriptions.............................................................................. 30
7-3 VRM 10.1 Pin Assignments .............................................................................................. 31