Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

Intel
®
Xeon™ Processor and Intel
®
E7500/E7501 Chipset Compatible Platform Design Guide 199
Platform Power Delivery Guidelines
11.4 Intel
®
ICH3-S Power Delivery Guidelines
11.4.1 1.8 V/3.3 V Power Sequencing
The ICH3-S has two pairs of associated 1.8 V and 3.3 V supplies. These are {VCC1_8, VCC3_3}
and { VCCSus1_8, VCCSus3_3}. The difference between the two associated supplies must
never be greater than 2.0 V. The 1.8 V supply may come up before the 3.3 V supply without
violating this rule (though this generally does not occur because the 1.8 V supply is typically
derived from the 3.3 V supply with a linear regulator). One serious consequence of violation of this
“2 V Rule” is electrical overstress of oxide layers, resulting in component damage.
The majority of the ICH3-S I/O buffers are driven by the 3.3 V supplies but are controlled by logic
powered by the 1.8 V supplies. Therefore, another consequence of faulty power sequencing arises
if the 3.3 V supply comes up first. In this case, the I/O buffers will be in an undefined state until the
1.8 V logic is powered up. Some signals that are defined as “Input-only” actually have output
buffers that are normally disabled, and the ICH3-S may unexpectedly drive these signals if the
3.3 V supply is active while the 1.8 V supply is not.
Note: These power sequencing circuits require that a linear regulator derive the ICH3-S 1.8 V power rail.
These circuits are all designed with the assumption that 3.3 V is derived by the system power
supply and that a 1.8 V linear regulator is used. Such circuitry is not needed if the voltage regulator
guarantees the 2 V Rule.
Figure 11-25 is an example of power-on sequencing circuit using a Linear Regulator that ensures
the 2 V Rule is obeyed. This circuit uses an NPN (Q2) and a PNP (Q1) transistor to ensure the
1.8 V supply tracks the 3.3 V supply. The NPN transistor controls the current through PNP from
the 3.3 V supply into the 1.8 V power plane by varying the voltage at the base of the PNP
transistor. By connecting the emitter of the NPN transistor to the 1.8 V plane, current will not flow
from the 3.3 V supply into 1.8 V plane when the 1.8 V plane reaches 1.8 V. It is important to use
1% resistors for precise operating conditions. When the NPN gets hot (junction temperature
exceeds 125°C), it can overdrive the 1.8 V rail as high as 2 V.
Figure 11-25. Example 1.8 V/3.3 V Power Sequencing Circuit Using a Linear Regulator
220
1%
221
1%
475
1%
+3.3 V
+1.8 V
Q2
NPN
Q1
PNP