Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

Intel
®
82870P2 (P64H2)
114 Intel
®
Xeon™ Processor and Intel
®
E7500/E7501 Chipset Compatible Platform Design Guide
8.1.1 General PCI-X Routing Guidelines
Most PCI-X signals are timing critical. The timing critical signals have length restrictions for
propagation, setup, and hold requirements. Table 8-2 itemizes all timing critical and some of the
non-critical signals. All of the topologies in the following sections itemize the lengths for the
timing critical signals in configurations which Intel simulated.
The configurations enumerated in the following sections were simulated on a 50 Ω ± 10% board
impedance. Route the signals stripline with 5-mil wide traces with 10-mil wide spacing (5/10).
PCI control signals always require pull-up resistors on the motherboard to ensure that they contain
stable values when no agent is actively driving the bus. This includes FRAME#, TRDY#, IRDY#,
DEVSEL#, STOP#, SERR#, PERR#, LOCK#, INTA#, INTB#, INTC#, INTD#. In addition the
64-bit extension signals REQ64#, ACK64#, AD[63:32], C/BE[7:4]#, and PAR64 require pull-ups.
In the special case of a 64-bit bus that only contains 64-bit devices down, the pull-ups for
AD[63:32], C/BE[7:4]# and PAR64 may not be needed. If the device down drives AD[63:32],
C/BE[7:4]# and PAR64 during a 32-bit transaction then pull-ups are not necessary. If the device
down leaves AD[63:32], C/BE[7:4]#, and PAR64 floating during a 32-bit transaction, then pull-ups
will be required. Refer to the datasheet or specification for the 64-bit device down to determine if
pull-ups are necessary.
A PCI/PCI-X bus has a maximum rating. PCI buses may be down shifted to a lower rating
depending on the devices plugged into the bus. PCI/PCI-X buses may not be upshifted. Table 8-3
lists the ordering of PCI/PCI-X mode and frequencies. This means that when PCI-X 133 MHz is
specified, the configuration can run at any mode or frequency below it (see Table 8-3). Topologies
specified at PCI-X 100 MHz configurations can run at any speed below it, but not PCI-X 133 MHz.
PCI 66 MHz configurations can be run at PCI 66 MHz, PCI-X 66 MHz, or below. PCI-X 66 MHz
configurations may not run at PCI 66 MHz.
Note: All topologies documented are stated at the highest rated bus mode and frequency for the
motherboard topology.
Table 8-2. Simulated Timing Critical Signals
PxAD[63:0], PxC/BE[7:0]#, PxDEVSEL#, PxFRAME#, PxIRDY#, PxTRDY#, PxSTOP#, PxPERR#, PxSERR#,
PxREQ[5:0]#, PxPLOCK#, PxPAR64, PxGNT[5:0]#, PCIXCAP, PxM66EN, Px_133EN, PxREQ64#,
PxACK64#, PxIRQ[15:0]
Table 8-3. PCI/PCI-X Mode and Frequency Ordering
Bus Mode and Frequency Ordering
PCI-X 133 MHz
PCI-X 100 MHz
PCI 66 MHz
PCI-X 66 MHz
PCI 33 MHz