ITP700 Debug Port Design Guide

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ITP700 Debug Port Design Guide 3

Contents

Uniprocessor ITP Debug Port Implementation Guidelines................................................ 11

1.1 General Description.............................................................................................. 11

1.1.1 ITP Features ......................................................................................... 11

1.2 Recommended Signal Terminations .................................................................... 12

1.3 ITP Signal Layout Guidelines ............................................................................... 13

1.3.1 System Signal Layout Guidelines.......................................................... 14

1.3.2 JTAG Signal Layout Guidelines ............................................................ 15

1.3.3 Execution Signal Layout Guidelines...................................................... 16

1.4 ITP700 Flex Alternative Debug Port ..................................................................... 17

1.4.1 Signal Descriptions ............................................................................... 18

1.4.2 Termination and Routing Guidelines..................................................... 19

1.4.3 ITP700 Flex Deltas to Standard ITP AC/DC Characteristics ................ 21

2 Multiprocessor ITP Debug Port Implementation Guidelines ............................................. 23

2.1 General Description.............................................................................................. 23

2.1.1 ITP Features ......................................................................................... 24

2.2 Recommended Signal Terminations .................................................................... 24

2.3 ITP Signal Layout Guidelines ............................................................................... 25

2.3.1 System Signal Layout Guidelines.......................................................... 26

2.3.2 JTAG Signal Layout Guidelines ............................................................ 27

2.3.3 Execution Signal Layout Guidelines...................................................... 29

3 ITP700 DPA Specifications ............................................................................................... 33

3.1 ITP700 DPA Specifications .................................................................................. 33

3.2 ITP700 DPA DC Electrical Characteristics ........................................................... 36

3.3 ITP700 DPA AC Electrical Characteristics ........................................................... 38

3.4 Pin Absolute Maximums ....................................................................................... 40

3.5 Mechanical Requirements .................................................................................... 41

4 ITP700 LVDPA Specifications........................................................................................... 45

4.1 ITP700 LVDPA Signal Descriptions ..................................................................... 45

4.2 ITP700 LVDPA DC Electrical Characteristics....................................................... 48

4.3 ITP700 LVDPA AC Electrical Characteristics....................................................... 50

5 ITP700 Flex Mechanical Requirements ............................................................................ 53

6 Intel

Xeon

™

Processor with 512- KB L2 Cache at 2.20, 2.0, and 1.80 GHz DP / Intel

Xeon™ Processor MP Server System Implementation Guidelines .................................. 57

6.1 Termination and Routing Guidelines .................................................................... 57

7 Intel

Pentium

4 Processor / Mobile Intel

Pentium

4 Processor-M / Intel

Centrino

™

Mobile Technology System Implementation Guidelines.................................................... 59

7.1 Termination and Routing Guidelines .................................................................... 59