Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

R
D
C
B
B
D
C
1
12345678
2345678
A
A
LAST REVISED:
DRAWN BY:
1900 Prairie City Road
Folsom, California 095630 OF
TITLE:
PROJECT:
Rev:
KC533
Intel Corporation
CHASSIS_GND
CHASSIS_GND
38
37
36
35
1
7
12
4
9
20
14
22
17
25
34
33
6
13
11
5
3
10
8
2
32
31
30
29
15
21
23
16
18
24
26
19
28
27
+V2_5 +V2_5
40
Connect capacitors between chassis ground
Exact numbers and values to be determined
based on results of EMI testing
and signal ground on both sides of magnetics module.
Dual RJ-45 Ethernet Connectors
Intel (R) 82545EM Gigabit Etherenet controller uses a single RJ-45 port
85
C1759
0.01UF
C1765
0.01UF
C1764
0.01UF
C1766
0.01UF
38
37
36
35
1
7
12
4
9
20
14
22
17
25
34
33
6
13
11
5
3
10
8
2
32
31
30
29
15
21
23
16
18
24
26
19
28
27
U148
C1762
0.01UF
C1761
0.01UF
C1763
0.01UF
C1760
0.01UF
PORT2_MDI[0]+
37,41
PORT1_MDI[1]+
37,41
PORT2_MDI[0]- 37,41
PORT2_MDI[2]- 37,41
PORT1_MDI[2]+
37,41
C228
10UF
C231
10UF
C376
4.7UF
C230
4.7UF
PORT2_MDI[1]+37,41
PORT2_MDI[1]- 37,41
PORT1_MDI[3]+
37,41
PORT1_MDI[0]+
37,41
PORT1_MDI[0]- 37,41
PORT1_MDI[1]- 37,41
PORT1_MDI[2]- 37,41
R340
300
R339
300
R342
300
R341
300
PORT1_LINK_N
37
PORT1_MDI[3]- 37,41
C234
1000PF
C233
1000PF
C232
1000PF
C229
1000PF
PORT2_MDI[3]+37,41
PORT1_ACTIVITY_N
37
PORT2_ACTIVITY_N
37
PORT2_LINK_N
37
PORT2_MDI[2]+37,41
PORT2_MDI[3]- 37,41
1.0INTEL (R) E7501 CHIPSET CUSTOMER REFERENCE BOARD
11/18/02