Intel Xeon Processor and Intel E7500/E7501Chipset Compatible Platform Design Guide

Intel
®
Xeon™ Processor and Intel
®
E7500/E7501 Chipset Compatible Platform Design Guide 131
Intel
®
82870P2 (P64H2)
8.2.6.9 Reference Schematic for Single-Slot Parallel Mode
Note that the following schematic is based on definition and simulation of the P64H2. This
schematic has not been fully validated.
Figure 8-17. Reference Schematic for Single-Slot Parallel Mode
PCIXCAP
M66EN
SLOT 1 Present 1
SLOT 1 Present 2
--12V
+12V
+5V
+3V
--12V
+12V
+5V
+3V
Fault#
Pwren 1
RST #
CLK
Power
Logic
PxAD[63:0]
PxC/BE[7:0]
PxPAR
PxPAR64
PxREQ64#
PxACK64#
PxFRAME#
PxIRDY#
PxTRDY#
PxSTOP#
PxDEVSEL#
PxPLOCK#
PxGNT0#
PxPERR#
PxSERR#
PxREQ0#
PCI SLOT
10K
2.2K
10K
3.3V
8.2K
3.3V
8.2K
3.3V
3.3V
5.6K
10K
3.3V
5K
3.3V
Comparator
Comparator
Intel®
P64H2
PxPCLKO [0]
PxPCLKI
PxAD[63:0]
PxC/BE[7:0]
PxPAR
PxPAR64
PxREQ64#
PxACK64#
PxFRAME#
PxIRDY#
PxTRDY#
PxSTOP#
PxDEVSEL#
PxPLOCK#
PxGNT[0]#
PxPERR#
PxSERR#
PxREQ[0]#
PxM66EN
PxPCIXCAP
PxIRQ[15] (HxSWITCHA)
PxIRQ[14] (HxFAULTA#)
PxIRQ[13] (HxPRSNT2A)
PxIRQ[12] (HxPRSNT1A)
PxIRQ[11] (HxM66ENA)
HPxSLOT[2] (HXPCIXCAP1A)
HPxSLOT[1] (HXPCIXCAP2A)
PxGNT[5]# (HxRESETA#)
HPxSOC (HxGNLEDA)
HPxSOL (HxAMLEDA)
HPxSORR# (HxBUSENA#)
HPxSIL# (HxCLKENA#)
HPxSOD (HxPW RENA)
PxIRQ[10] (HxSWITCHB)
PxIRQ[9] (HxFAULTB#)
PxIRQ[8] (HxPRSNT2B)
PxREQ[5]# (HxPRSNT1B)
PxREQ[4]# (HxM66ENB)
PxREQ[3]# (HXPCIXCAP1B)
HPxSLOT[0] (HXPCIXCAP2B)
HPxSOR# (HxRESETB#)
HPxSIC (HxGNLEDNB)
HPxSID (HxAMLEDB)
PxGNT[4]# (HxBUSENB#)
PxGNT[3]# (HxCLKENB#)
HPxSOLR (HxPW RENB)
330
Switch
330
33
33
8.2K
8.2K
3.3V
ENBENB
1K1K
PWROK
PxPCLKO [6]
PxREQ[1:2]#
should be
pulled to 3.3V
through 8.2K
8.2K
8.2K
3.3V
64
Input to PW ROK
10K
Inverter
To run this slot in
33MHz PCI m ode you
must have a pull-
down option or
equivalent logic on
M66EN
5K
3.3V
5K
3.3V
100K