Hub Datasheet
Intel
®
E7505 Chipset MCH Datasheet 125
Register Description
3.8.4 PCISTS2—PCI Status Register (D2:F0)
Address Offset: 06–07h
Default Value: 00A0h
Attribute: RO, R/WC
Size: 16 bits
PCISTS2 is a 16-bit status register that reports the occurrence of error conditions associated with
the primary side of the virtual PCI-to-PCI bridge embedded within the MCH.
Note: Software writes a 1 to clear set bits.
Bits
Default,
Access
Description
15
0b
RO
Detected Parity Error (DPE). Hardwired to 0. Parity is not supported on the primary side
of this device.
14
0b
R/WC
Signaled System Error (SSE).
0 = No MCH Device 1 generated SERR message over HI_A.
1 = MCH Device 2 generated an SERR message over HI_A for any enabled Device 2
error condition.
13
0b
RO
Received Master Abort Status (RMAS). Hardwired to 0. The concept of master abort
does not exist on primary side of this device.
12
0b
RO
Received Target Abort Status (RTAS). Hardwired to 0. The concept of target abort
does not exist on primary side of this device.
11
0b
RO
Signaled Target Abort Status (STAS). Hardwired to 0. The concept of target abort does
not exist on primary side of this device.
10:9
00b
RO
DEVSEL# Timing (DEVT). Hardwired to 00. The MCH does not support subtractive
decoding devices on bus 0. Therefore, this bit field is hardwired to 00 to indicate that
device 2 uses the fastest possible decode.
8
0b
RO
Master Data Parity Error Detected (DPD). Hardwired to 0. Parity is not supported on
the primary side of this device.
7
1b
RO
Fast Back-to-Back (FB2B). Hardwired to 1. This indicates that fast back to back writes
are always supported on this interface. While fast back to back selection has no meaning
on the hub interface, this bit is 1 to prevent disabling of this function on downstream
interfaces.
6 Reserved
5
1b
RO
66/60 MHz capability (CAP66). Hardwired to 1. HI_B is capable of delivering data at a
rate equal to that of any PCI66 device. Indicates to configuration software that
downstream devices may also be effectively enabled for 66 MHz operation.
4:0 Reserved