Datasheet

Intel Desktop Board WX58BP Technical Product Specification

Table 13. Chassis Intrusion Header

Pin Signal Name

1 Intruder

2 Ground

Table 14. Front and Rear Chassis (3-Pin) Fan Headers

Pin Signal Name

1 Control

(Note)

2 +12 V

3 Tach

Note: These fan headers use voltage variance control for fan speed.

Table 15. Processor and Rear Chassis 2 (4-Pin) Fan Headers

Pin Signal Name

1 Ground

(Note)

2 +12 V

3 FAN_TACH

4 FAN_CONTROL

Note: These fan headers use Pulse Width Modulation control for fan speed.

2.2.2.2 Add-in Card Connectors

This board has the following add-in card connectors:

 PCI Express* 2.0 x16: Two PCI Express* 2.0 x16 connectors supporting

simultaneous transfer speeds up to 8 GB/sec of peak bandwidth per direction and

up to 16 GB/sec concurrent bandwidth.

 PCI Express* 2.0 x4: One PCI Express* 2.0 x4 connector (implemented using a x4

physical connector capable of accepting a x16 card). The x4 interface supports

simultaneous transfer speeds up to 250 MB/sec of peak bandwidth per direction

and up to 5 GB/sec concurrent bandwidth.

 PCI Express* 1.1 x1: Two PCI Express* 1.1 x1 connectors. The x1 interface

supports simultaneous transfer speeds up to 250 MB/sec of peak bandwidth per

direction and up to 2 GB/sec concurrent bandwidth.

 PCI Conventional (rev 2.3 compliant) bus: One PCI Conventional bus add-in card

connector. The SMBus is routed to the PCI Conventional bus connector. PCI

Conventional bus add-in cards with SMBus support can access sensor data and

other information residing on the board.

Note the following considerations for the PCI Conventional bus connector:

 The PCI Conventional bus connector is bus master capable.

 SMBus signals are routed to the PCI Conventional bus connector. This enables PCI

Conventional bus add-in boards with SMBus support to access sensor data on the

board. The specific SMBus signals are as follows:

 The SMBus clock line is connected to pin A40.

 The SMBus data line is connected to pin A41.