Technical Product Specification

Intel® Server Board S2600IP and Intel® Workstation Board W2600CR TPS Platform Management Overview
Revision 1.4 Intel order number G34153-004 61
The BMC only monitors for the “CATERR held low” condition. A pulsed low condition is ignored
by the BMC.
If a CATERR-low condition is detected, the BMC logs an error message to the SEL against the
CATERR sensor and then queries each CPU to determine if it was due to an MSID mismatch
condition. An MSID mismatch occurs if a processor is installed into a system board that has
incompatible power capabilities. The MSID mismatch condition is indicated in a processor
machine check MSR. If PECI is non-functional (it isn’t guaranteed in this situation), then MSID
mismatch can’t be detected in that case.
If the CATERR is due to an MSID mismatch, then the BMC will log an additional SEL log
against the MSID Mismatch sensor, light the CPU fault LED, emit a beep code, and let the
system hang. Please refer Table 9 (BMC Beep Codes) for beep code details. If no MSID
mismatch is detected, then the default action after logging the SEL entry is to reset the system.
The BIOS setup utility provides an option to disable or enable system reset by the BMC for
detection of this condition.
4.3.4.5 CATERR Sensor
The BMC supports a CATERR sensor for monitoring the system CATERR signal.
The sensor is rearmed on power-on (AC or DC power on transitions). It is not rearmed on
system resets in order to avoid multiple SEL events that could occur due to a potential reset
loop if the CATERR keeps recurring, which would be the case if the CATERR was due to an
MSID mismatch condition.
On Intel
®
server boards, the CATERR signal from each CPU are tied together and routed to the
BMC as one signal. When the BMC detects that this aggregate CATERR signal has asserted, it
can then go through PECI to query each CPU to determine which one was the source of the
error and write an OEM code identifying the CPU slot into an event data byte in the SEL entry. If
PECI is non-functional (it isn’t guaranteed in this situation), then the OEM code should indicate
that the source is unknown.
Event data byte 2 and byte 3 for CATERR sensor SEL events
ED2 – CATERR type.
0: Unknown
1: CATERR
2: CPU Core Error (not supported on Intel
®
Server Platforms Based on Intel
®
Xeon
®
Processor
E5 4600/2600/2400/1600 Product Families)
3: MSID Mismatch
ED3 – CPU bitmap that causes the system CATERR.
[0]: CPU0
[1]: CPU1
[2]: CPU2
[3]: CPU3
IPMI Sensor Characteristics
1. Event reading type code: 03h (Digital discrete)