Technical Product Specification
Intel® Server Board S2600IP and Intel® Workstation Board W2600CR TPS Functional Architecture
Revision 1.4 Intel order number G34153-004 29
Supported and Validated
Supported but not Validate
Supported with Limited Validation
Table 5. LRDIMM Support Guidelines
Ranks Per
DIMM and
Data Width
1
Memory Capacity
Per DIMM
2
Speed (MT/s) and Voltage Validated by
Slot per Channel (SPC) and DIMM Per Channel (DPC)
3,4
2 Slots per Channel
1DPC
2DPC
1.35V
1.5V
1.35V
1.5V
Intel
®
Xeon
®
processor E5-2600 product family
QRx4
(DDP)
5
16GB
32GB
1066
1066, 1333
1066
1066, 1333
QRx8
(P)
5
8GB
16GB
1066
1066, 1333
1066
1066, 1333
Intel
®
Xeon
®
processor E5-2600 v2 product family
QRx4
(DDP)
5
16GB
32GB
1066, 1333,
1600
1066, 1333, 1600,
1866
1066, 1333, 1600
1066, 1333,
1600
8Rx4
(QDP)
5
32GB
64GB
1066
1066
1066
1066
Notes:
1. Physical Rank is used to calculate DIMM Capacity.
2. Supported and validated DRAM Densities are 2Gb and 4Gb.
3. Command Address Timing is 1N.
4. The speeds are estimated targets and will be verified through simulation.
5. DDP – Dual Die Package DRAM stacking. P – Planer monolithic DRAM Die.
Supported and Validated
3.2.2.2 Memory Population Rules
Note: Although mixed DIMM configurations are supported, Intel only performs platform
validation on systems that are configured with identical DIMMs installed.
Each processor provides four banks of memory, each capable of supporting up to 2 DIMMs.
DIMMs are organized into physical slots on DDR3 memory channels that belong to
processor sockets.
The memory channels from processor socket 1 are identified as Channel A, B, C and D.
The memory channels from processor socket 2 are identified as Channel E, F, G, and H.
The silk screened DIMM slot identifiers on the board provide information about the
channel, and therefore the processor to which they belong. For example, DIMM_A1 is
the first slot on Channel A on processor 1; DIMM_E1 is the first DIMM socket on
Channel E on processor 2.
The memory slots associated with a given processor are unavailable if the
corresponding processor socket is not populated.