Paper

ManualsBrandsIntel ManualsOtherIntel Core2 Duo Processor T5500

Massive Parallelism for

Mission-Critical Applications

Advanced Explicitly Parallel Instruction Computing

(EPIC) Architecture

Intel® Itanium® 9500

processor series, codenamed Poulson, is the latest Intel Itanium

processor in a long line of ground breaking designs. Optimized for Explicitly Parallel

Instruction Computing (EPIC) principles, Intel Itanium processor 9500 series’ advanced

EPIC Architecture can be best summarized as exploiting parallelism on all levels: pipe-

line, core, thread, memory, pipeline and instructions. End-users are now able to ex-

tract more inherent parallelism in their code than ever before to deliver a new level of

performance, while beneting from the mainframe-class RAS features to deliver an

always-on experience in their mission-critical enterprise.

Steve Undy

Intel Corporation

WHITE PAPER

Intel® Itanium® Processor 9500 Series

Mission Critical Computing

Summary of content (4 pages)

PAGE 1
WHITE PAPER Intel® Itanium® Processor 9500 Series Mission Critical Computing Massive Parallelism for Mission-Critical Applications Advanced Explicitly Parallel Instruction Computing (EPIC) Architecture Steve Undy Intel Corporation Intel® Itanium® 95003 processor series, codenamed Poulson, is the latest Intel Itanium processor in a long line of ground breaking designs.
PAGE 2
Adopting an Advanced EPIC Architecture Intel Itanium processor 9500 series represents a near cleansheet redesign of the Intel Itanium cores to support an unprecedented amount of instruction-level parallelism in its main execution pipeline. It can execute up to 12 instructions each cycle in 4 instruction bundles. It has 2 memory execution units, 2 general purpose integer units, 2 ALU units, 2 floating point units, 3 branch units and 1 NOP unit.
PAGE 3
Intel® Itanium® 9500 Processor Series: Advanced EPIC Architecture WHAT IS EPIC? EPIC or Explicitly Parallel Instruction Computing, represents a paradigm shift in the development of instruction set architectures. Instead of placing the main burden of extracting parallelism and performance on the underlying computing hardware, a synergy is developed between the software ecosystem and the hardware implementation.
PAGE 4
Intel® Itanium® 9500 Processor Series: Advanced EPIC Architecture Instruction Level Parallelism (ILP) The EPIC philosophy in general and Intel Itanium are specifically designed to optimize the location of the interface between software and hardware. In addition to the fine-grained control compilers have, the new Intel Itanium processor 9500 series architecture provides hint instructions to communicate additional information from software to hardware.