Intel Core Duo Processor and Intel Core Solo Processor on 65 nm Process

Errata
30 Specification Update
AE34. Pending x87 FPU Exceptions (#MF) following STI May Be Serviced
before Higher Priority Interrupts
Problem: Interrupts that are pending prior to the execution of the STI (Set Interrupt Flag)
instruction are normally serviced immediately after the instruction following the STI.
An exception to this is if the following instruction triggers a #MF. In this situation, the
interrupt should be serviced before the #MF. Because of this erratum, if following STI,
an instruction that triggers a #MF is executed while STPCLK#, Enhanced Intel
SpeedStep
®
Technology transitions or Thermal Monitor events occur, the pending #MF
may be serviced before higher priority interrupts.
Implication: Software may observe #MF being serviced before higher priority interrupts.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.
AE35. Programming the Digital Thermal Sensor (DTS) Threshold May Cause
Unexpected Thermal Interrupts
Problem: Software can enable DTS thermal interrupts by programming the thermal threshold
and setting the respective thermal interrupt enable bit. When programming DTS
value, the previous DTS threshold may be crossed. This will generate an unexpected
thermal interrupt.
Implication: Software may observe an unexpected thermal interrupt occur after reprogramming
the thermal threshold.
Workaround: In the ACPI/OS implement a workaround by temporarily disabling the DTS threshold
interrupt before updating the DTS threshold value.
Status: For the steppings affected, see the Summary Tables of Changes.
AE36. CPU_CLK_UNHALTED Performance Monitoring Event (3CH) Counts
Clocks When the Processor Is in the C1/C2 Processor Power States
Problem: The CPU_CLK_UNHALTED performance monitoring event should only count clocks
when the processor is running. However, due to this erratum, CPU_CLK_UNHALTED
performance monitoring event may count clocks when the cores have been halted in
the C1/C2 processor power states. The count may be incorrect when the two cores are
not in C1/C2 state simultaneously
Implication: The CPU_CLK_UNHALTED performance monitoring event may read a somewhat larger
value than expected.
Workaround: None identified.
Status: For the steppings affected, see the Summary Tables of Changes.